Calrec ARGO, Инструкция по установке и техническому обслуживанию

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If the grand master clocks on the AoIP
networks were to fail, it is possible for the
Impulse Core to become grand master,
synchronising AoIP network endpoints to
an internal or legacy input clock source.
This is unlikely in practice as most
networks will have backup grand master
clocks that are ranked “better” in the best
master clock decision algorithm.
The control processor sync subsystem
generates a backplane clock signal with
encoded sequence numbers in order to
synchronise the core routers and DSP
and to determine offset between IP
packets to achieve coherence between
samples transported on different routers
in the core.
Legacy Sync Connections
The sync subsystem on the control
processor module provides two BNC
input connectors on the module front
panel in addition to the SFP cages.
These BNC connectors are dedicated
to legacy video and wordclock inputs
for synchronisation. If a network grand
master clock source is unavailable, it is
possible to synchronise the Impulse Core
PTP as master to a legacy clock source
transmitted as a video or wordclock
signal.
In such a case, it may be possible for
the impulse core sync subsystem to be
promoted to grand master and generate
PTP ethernet packets to synchronise
the AoIP network via the SFP interfaces
described above.
The BNC inputs have an input impedance
of 75 Ohms. The signals are buffered
on the Control Processor module and
the video input is passed through a
sync-separator device to extract timing
information. The logic level video clock
and wordclock signals are processed
within the sync subsystem to synthesise
the local timebase.
Impulse Synchronisation sources.
The UN6426 Control Processor
module provides the Impulse Core Sync
Subsystem, which uses a dedicated
network interface for PTP synchronisation
(or BNCs for legacy inputs) to generate a
timebase for synchronising audio transfer
on the backplane. The sync system
obtains an audio synchronisation source
from the external AoIP network’s PTPv2
clock via the 2 SFP connections on the
front of the Control Processor module as
shown above right.
It also has two BNC connectors on its
front panel for incoming legacy system
synchronisation sources:
• 1 x TTL word clock input
• 1 x Video clock input
Impulse being an AoIP device requires
PTPv2 sync. The core can act as a PTP
master, or it can slave to an external PTP
master, either way, at least one of the
PTP connections on the control processor
needs to be connected to the media
network to exchange PTP data.
If the core is acting as master, it can
either free run or use the wordclock or
video inputs to be synchronous with a
legacy sync system
The firmware multiplexes these sources
based on a priority list and failover
arrangement to select & lock-on to an
active reference clock or switch to an
alternative source if synchronisation is
lost. The board also includes an on-board
reference clock for use when neither the
external AoIP clock or the legacy sync
inputs are selected.
AoIP Clock
The IEEE 1588-2008 (PTPv2) standard
for Precision Time Protocol (PTP)
specifies a mechanism for synchronising
multiple endpoints over an ethernet IP
network. With high end commercial
off-the-shelf network switches and a
well-managed network, sub-microsecond
synchronisation between endpoints can
be achieved.
SYNC INPUTS
PTP specifies that the network has a
Grand Master Clock source, which is
generally synchronised to a high precision
real-time clock source such as GPS.
The grand master clock transmits
ethernet packets to switches and
endpoints across the network, which are
returned to the clock source in order to
measure round-trip delay.
An algorithm is used to calibrate the delay
and synchronise the endpoint to the clock
source.
If the grand master clock on a network
fails, another algorithm is used to
determine the next best clock source
on the network, which is automatically
nominated as the new grand master.
To synchronise all audio data transfers
within the Impulse Core and audio
transmission across the external network,
a centralised PTP Synchronisation
Subsystem is implemented on the core
control processor module.
This subsystem synchronises the core
to the PTP grand master clock through
a pair of SFP connectors providing
dedicated connections to primary and
secondary AoIP networks. These SFP
interfaces can only operate at 1Gbps,
which is more than enough for the sparse
PTP synchronisation traffic.
SYNCHRONISATION