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Document type:

Title:

Revision date:

Revision:

User's Manual (MUT)

Mod. V791, ICARUS 32-channel analog board

27/05/99

2

NPO:

Filename:

Number of pages:

Page:

00100/98:V791x.MUTx/02

V791MN4.DOC

17

15

4. Hardware settings

The hardware settings described in the following are foreseen for both the versions,
nominally the Mod.V791C and the Mod.V791Q.

Selection of the clock source (external/internal):

it is performed by using the relevant soldering jumper pad (S2) placed on the PCB (refer
to Fig. 4.1):

 

Soldering placed in Position A (high position, EXT): 

Æ

 external clock selected;

 

Soldering placed in Position B (low position, INT): 

Æ

 internal clock selected.

The default setting is external clock.

Generation of the RTXPWS power supply:

the RTXPWS output signal is used to 5 V to a possible external optical decoupler
which can be used to break the ground loop. The RTXPWS power supply is provided at
the relevant pin of the output connector (LINK CONN) when a soldering is performed on
the relevant soldering pad (S1) placed on the PCB (refer to Fig. 4.1):

 No 

Soldering: 

Æ

 no RTXPWS power supply on the LINK connector;

 

Soldering on the S2 pad: 

Æ

 the RTXPWS power supply is present on the relevant

pin of the LINK connector.

By default there is no soldering on the S2 pad.

Limitation of the Op-Amp bandwidth:

the PCB houses four empty pads(refer to Fig. 4.1), one for each Op-Amp, which allow to
solder an additional capacitor C

BL

 to reduce the bandwidth of the relevant Op-Amp:

 No 

C

BL

 capacitor: 

Æ

 default Op-Amp bandwidth;

 

C

BL

 capacitor soldered on the pad: 

Æ

 the bandwidth of the relevant Op-Amp is

reduced.

By default there is no capacitor soldered on the pad.

Содержание V791

Страница 1: ...Technical Information Manual MOD V 791 28 May 1999 Revision n 2 32 CH ICARUS ANALOG BOARD NPO 00100 98 V791x MUTx 02 ...

Страница 2: ...ge 00100 98 V791x MUTx 02 V791MN4 DOC 17 2 TABLE OF CONTENTS 1 GENERAL DESCRIPTION 4 1 1 OVERVIEW 4 1 2 MAIN TECHNICAL SPECIFICATIONS 5 2 FUNCTIONAL DESCRIPTION 6 3 TECHNICAL SPECIFICATIONS 9 3 1 PACKAGING 9 3 2 POWER REQUIREMENTS 11 3 3 EXTERNAL CONNECTIONS 11 3 3 1 INPUTS 13 3 3 2 OUTPUTS 14 3 4 DISPLAYS 14 4 HARDWARE SETTINGS 15 5 OUTPUT DATA 17 ...

Страница 3: ...S FIG 2 1 BLOCK DIAGRAM OF THE MODEL V791 6 FIG 3 1 MODEL V791 BOARD AND CONNECTORS 9 FIG 3 2 FRONT PANEL OF THE MODEL V791 10 FIG 3 3 PIN CONFIGURATION OF THE CONNECTORS ON THE MODEL V791 12 FIG 4 1 COMPONENT LOCATION ON THE MODEL V791 BOARD 16 FIG 5 1 FORMAT OF THE OUTPUT DATA PACKET 17 LIST OF TABLES TABLE 1 1 MODEL V791C AND MODEL V791Q MAIN TECHNICAL SPECIFICATIONS 5 TABLE 3 1 POWER REQUIREME...

Страница 4: ...8 channel blocks Each block is made of two 4 channel analog multiplexers and a 20 MHz ADC Each channel is sampled at a 2 5 Ms s rate and digitized with a 10 bit resolution by using a time division multiplexing technique The maximum delay between the sampling of a channel and the following one is 400 ns The Model V791 is housed in a 1 unit wide 6 unit high Eurocard mechanics with special shielding ...

Страница 5: ...unt fC Input signals 1 nA x 3 µs 3 fC Output data 10 bit double data 40MHz 10 bit double data 40MHz Noise RMS 2 LSB 2 LSB S N charge 10 6 Input range 100 10 nA 300 10 fC Test pulse input range 2 5 Vpp 2 5 Vpp Sampling rate 400 ns channel 400 ns channel Preamp Transconductance 5 6 MΩ 0 15 pF 100 MΩ 0 5 pF Preamplifier time constant 1 µs 50 µs First shaper time constant 1 µs 0 27 µs Second shaper ti...

Страница 6: ...C19 C21 C23 C25 C27 C29 C31 P3 P1 Link Conn Pre Pre Pre Pre C0 C2 C4 C6 Multiplexer 4 1 AD8184 Pre Pre Pre Pre Multiplexer 4 1 AD8184 Pre Pre Pre Pre Multiplexer 4 1 AD8184 Pre Pre Pre Pre Multiplexer 4 1 AD8184 Pre Pre Pre Pre Multiplexer 4 1 AD8184 Pre Pre Pre Pre Multiplexer 4 1 AD8184 Pre Pre Pre Pre Multiplexer 4 1 AD8184 Pre Pre Pre Pre Multiplexer 4 1 AD8184 out Acq on Shaper Shaper Shaper ...

Страница 7: ...e converted The operational amplifier has as well a capacitor which can be used for limiting the bandwidth in order to reduce the noise although this implies a deterioration of the cross talk This can be done via hardware by soldering a capacitor on the printed board capacitor CBL on the printed board please refer to Fig 4 1 The ADC is a 10 bit 20 MHz converter with external references The third s...

Страница 8: ...a solder on an appropriate pad in the printed board S1 soldering pad please refer to Fig 4 1 The output serial link features a 21 bit data word which is composed as follows 10 bit ADC datum coming in turn from one of the channels 0 15 10 bit ADC datum coming in turn from one of the channels 16 31 1 bit SYNC datum for the synchronisation of the signals The transmission sequence is such that each co...

Страница 9: ... connector front panel serial link output connector Link Conn Σout output connector Fig 3 1 shows the location of the connectors on the board and the three main functional sections preamplifier and shaper section ADC and analog multiplexer section digital section Please note that although the module is housed in a Eurocard standard mechanics the rear connectors are not VME standard connectors sinc...

Страница 10: ... ICARUS 32 channel analog board 27 05 99 2 NPO Filename Number of pages Page 00100 98 V791x MUTx 02 V791MN4 DOC 17 10 32 CH ICARUS DIGITIZER Mod V791 L I N K 40 MHz output serial link ACQ ON Σ OUT Acquisition On LED Σout output connector Fig 3 2 Front panel of the Model V791 ...

Страница 11: ...linear power supply with separate analog and digital supply sections It is suggested the use of a π filter regulator for the analog section The board has three common terminals AGND AGND1 DGND AGND refers to the preamplifiers AGND1 refers to the analog multiplexers shapers and ADCs and DGND is the common terminal of the digital section The Σout output signal is referred to the AGND1 common termina...

Страница 12: ... AGND AGND VEEA VEEA1 VDAC TPO_EN DGND AGND1 AGND1 VCCA1 VCCA TPULSE TPULSE TPE_EN AGND1 AGND AGND IN10 IN11 IN12 IN13 IN14 IN15 AGND AGND AGND AGND AGND AGND IN16 IN17 IN18 IN19 IN20 IN21 AGND AGND AGND AGND AGND AGND POWER SUPPLY CONNECTOR P1 TX2 TX2 OUTPUT CONNECOTR DGND TX1 TX1 DGND TX0 TX0 IN22 IN23 IN24 IN25 IN26 IN27 AGND AGND AGND AGND AGND INPUT CONNECTOR IN28 IN29 IN30 IN31 AGND AGND AGN...

Страница 13: ...amplifier VEEA1 5V for the analog multiplexer and shapers DGND common terminal of the digital section AGND common terminal of the preamplifiers AGND1 common terminal of the shapers analog multiplexers and ADCs B_CLK 40 MHz clock coming from the backplane differential LVDS B_CLK 40 MHz clock coming from the backplane differential LVDS inverted phase VDAC setting voltage of the baseline in the range...

Страница 14: ...ock output of the digital link inverted phase DGND common terminal for the digital link outputs RTXPWS power supply for a possible optical decoupler ANALOG ADDER OUTPUT CONNECTOR Σ OUT Mechanical specifications SMB connector Electrical specifications Σ OUT sum of the outputs of all the shapers WARNING the Σout output signal is referred to the shaper ground AGND1 and consequently the user must be v...

Страница 15: ... the RTXPWS output signal is used to supply 5 V to a possible external optical decoupler which can be used to break the ground loop The RTXPWS power supply is provided at the relevant pin of the output connector LINK CONN when a soldering is performed on the relevant soldering pad S1 placed on the PCB refer to Fig 4 1 No Soldering Æno RTXPWS power supply on the LINK connector Soldering on the S2 p...

Страница 16: ...ion B Internal clock selected EXT CLK INT S2 INT CLK EXT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CH CH CH CH CH CH CH CH 1 No soldering default no RTXPWS power supply on the LINK connector S1 Soldering the RTXPWS power supply is present on the LINK connector No capacitor default Default Op Amp bandwidth CBL CBL capacitor inserted Op Amp bandwidth limit...

Страница 17: ...ning the SYNC signal with n running from 0 to 15 The SYNC bit Bit 20 in the figure is set to 1 in correspondence with the couple of ADC data relative to the channels 15 and 31 n 15 CHANNEL 0 CHANNEL 16 0 CHANNEL 1 CHANNEL 17 0 CHANNEL 2 CHANNEL 18 0 CHANNEL 3 CHANNEL 19 0 CHANNEL 4 CHANNEL 20 0 CHANNEL 5 CHANNEL 21 0 CHANNEL 6 CHANNEL 22 0 CHANNEL 7 CHANNEL 23 0 CHANNEL 8 CHANNEL 24 0 CHANNEL 9 CH...

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