Board Layout
Broadcom
®
August 27, 2015 • 920737TAG04-HWUM101-RDS
Page 9
BCM920737TAG-04 WICED Smart Tag Hardware User Manual
Board Layout
The Smart Tag evaluation board assembly top view is shown in
. The resistors for memory selection are
highlighted in red.
Figure 2: Board Assembly (Top View)
By default, the board is set to use the internal LPO for sleep, but it can be set to use external LPO by installing
R102 and R103, highlighted in
, above. Resistor values are listed in
, below.
By default, the board is set to use EEPROM but can be set for serial flash by adjusting the resistors highlighted
in
to the desired setting (shown in
).
Table 1: Resistor Settings for External 32 KHz Crystal
Resistor
Internal LPO
External LPO
R26 DNI
0
Ohm
R27
DNI 0
Ohm
Table 2: SW8 DIP Settings (Memory Type)
Memory Type ON
OFF
EEPROM
1, 3, and 5
2, 4, 6, 7, and 8
SFLASH
a
a. For the SFLASH to be active R39 must be removed to disable the I
2
C bus. This is in addition to the switch
settings.
2, 4, 6, 7, and 8
1, 3, and 5
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