BELINEA 10 55 70, Руководство по обслуживанию

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3 .
Vertical Si Control
The pulse voltage output by the oscillator is
sent to the sawtooth wave generator. The size
and amplitude of the voltage of the sawtooth
wave generation can
changed by DC value
which output from Pin 1 of and the
vertical size can thus be controlled. This saw-
tooth wave voltage passes through a buffer and
is output from Pin 9 of
to pin 1 of
TDA8172 of the vertical drive circuit.
The ramp and DC offset are also con-
trolled by DAC output. The ramp gen-
erated across C432 is buffered internally to
by DC controlled variable gain stage.
The voltage is derived by sum of 2 DAC output,
and which are summed to-
gether to give 128 bit resolution.
4 .
Vertical Drive Circuit
(a) It is not sufficient to rely solely on the
oscillator circuit output to ensure the stability
of the vertical output, so a or second level
amplifier circuit must be inserted between the
oscillator circuit and the output. This circuit is
called the drive amplifier and in
to
amplifying the sawtooth wave also corrects the
vertical linearity.
After adding the drive circuit, because the level
of amplification can be considerable, enough
negative feedback can be added to correct ver-
tical linearity and increase the stability of the
circuit.
(b) If the current of the sawtooth wave flowing
through the deflection yoke is distorted, then
the top and bottom portions of the display will
be expanded or compressed, resulting in poor
linearity. In order to solve this problem, correc-
tion of the linearity of the sawtooth wave can
be carried out before the drive level.
5 .
Vertical Drive
Circuit
The uses a double power source, so it
can be viewed as an OCL drive
circuit.
In order that the DC coupled output stage accu-
rate DC reference, a DC reference voltage is
taken from
from
pin 12.
This used as the
reference voltage (via divider R497
and R499) for the DC coupled power amplifier,
This is 8 simple voltage to current in-
verting amplifier, using R203 to derive a volt-
age proportional to the
in the
winding of the yoke. This voltage is fed back
to the virtual signal earth inverting input of
power by This back to
back diode feedback network modifies the
linearity of the transfer characteristic in order
to give precept “S” correction linearity. in ad-
dition to the variable correction in the ramp
generator.
The vertical output amplifier has a voltage
boost circuit to triple the positive supply volt-
age during retrace in order to speed up
It does this by charging capacitor through
diode D212 during the normal forward scan.
Pin6 of the IC is the voltage supply to the power
output stage. When occurs, pin3 is
switched to the positive supply rail on
thus adding the voltage across
to that of
the supply rail, effective doubling the supply
momentarily.
6 .
Vertical Centering Adjustment
Since functions as an OCL circuit, VDC
is output from Pin 7 of so the central
can be changed to shift the on-screen
display up or down to prevent voltage
fluctua-
tion. After adjusting the power stabilizer at Pin
14 of UPC1883 (about 5V) and pin 11
of with R487, R497 and R499 this is
input to Pin 7 of to change the value of
the vertical center.
The DC operating point of the amplifier can be
varied by the VPOS DAC output which adds
or subtracts an offset into the output, thus vary-
ing the DC offset of the scan and hence the
vertical centring.
3.2.3. Pincushion Correction Circuit
1. If the width of the border in the center of the
screen is insufficient, the waveform
shown
in
Figure 3-3 below,
can
be used to add to hori-
zontal deflection B+ in order to change the
deflection of the horizontal deflection circuit.
This waveform is the parabola obtained after
regulation of the vertical period, and is created to
perform amplitude modulation on the horizontal
deflection current, as shown in Figure 3-4.
Figure 3-3 Correction Wave
F H : H o r i z o n t a l F r e q u e n c y
Vertical Frequency
Figure 3-4 Current Correction Wave