21
EESX20 and EESX30
Release 1.5 04/2020
2.3 PIN Description for connector CO201
Signal Name
Type I/O
(EESX)
Type
(EESX)
Description
VCC3.3_EES
Power
3.3 Volts +-5%
Power supply of the module for 3.3 Volts.
Ue_Ok
Input
LVTTL
Power supply for EESX-Evaluation-Board
available.
GND
Ground
0 Volts
Ground potential for signals and power
supply.
VMag_P38
Power
2.5 Volts
Power supply for FE-Ports
’ magnetics.
VMag_P12
Power
2.5 Volts
Power supply for FE-
Ports’ magnetics.
USB_D+/-
Bidirectional
5 Volts diff.
Differential USB data line.
USB_/OC
Input
LVTTL
Indicates overcurrent or thermal shutdown
conditions. Active low.
USB_Pwr_on
Power
LVTTL
USB Power source output for 5 Volts. Enable
= high
V24_TxD
Output
LVTTL
Transmit line of RS232 interface.
V24_RxD
Input
LVTTL
Receive line of RS232 interface.
I2C_Clk_Aux
Bidirectional
LVTTL
Clock line of I2C-Auxiliry-bus.
I2C_Da_Aux
Bidirectional
LVTTL
Data line of I2C-Auxiliry-bus.
/System_ready
Output
LVTTL
Control signal of LED “System ready”. (low
active)
/LED_Alarm
Output
LVTTL
Control signal of LED “Alarm”. (low active)
SPI_MISO_Aux
Input
LVTTL
MISO line of SPI-bus to the CPLD chip.
SPI_MOSI_Aux
Output
LVTTL
MOSI line of SPI-bus to the CPLD chip.
Relay_Control
Output
LVTTL
Signal for Relay control
/Reset_in
Input
LVTTL
Module reset. (low active)
LOS_P[1..8]
Logical
signal
LVTTL
Loss of signal for port 1 to 8. (for optical
transceivers)
/LED_Lnk_Act_P[1..8]
Output
LVTTL
LED signals port 1 to 8
/LED_Speed_P[1..[8]
Output
LVTTL
LED signals port 1 to 8
I2C_Clk_P[1..8]
Bidirectional
LVTTL
Clock line of I2C-Port[1..8]-bus. (for optical
transceivers)
SPI_Clk_Aux
Output
LVTTL
Clock line of SPI-bus to the CPLD chip.
SPI_/SS_Aux
Output
LVTTL
Slave select line of SPI-bus to the CPLD
chip.
I2C_Da_P[1..8]
Bidirectional
LVTTL
Data line of I2C-Port[1..8]-bus. (for optical
transceiver)
TD+/-P[1..8]
Output
analog
100BaseTX: +-
1V diff.
10BaseTX: +-
2,5V diff.
100BaseFX
Differential transmit lines for FE-Port [1..8]
RD+P[1..8]
Input
analog
100BaseTX: +-
1V diff.
10BaseTX: +-
2,5V diff.
100BaseFX
Differential receive lines for FE-Port [1..8]
Table 2-3: Pin Descriptions (View from module side for I/O type)