|
Table
of
Content
5
4
‐
5
‐
2
assword
Check
..............................................................................
43
4
‐
5
‐
3
Boot
Sector
Virus
Protection
.......................................................
43
4
‐
1
Chipset
Setup
.......................................................................................
44
4
‐
1
‐
1
Northbridge
VIA
CX700
Configuration
.........................................
44
4
‐
1
‐
2
DRAM
Clock/Timing
Configuration
..............................................
45
4
‐
1
‐
3
AGP
&
P2P
Bridge
Configuration
..................................................
45
4
‐
1
‐
4
Southbridge
VIA
CX700
Configuration
.........................................
46
4
‐
1
‐
5
High
Definition
Audio
...................................................................
46
4
‐
1
‐
6
PCI
Delayed
Transaction
...............................................................
47
4
‐
1
‐
7
On
Board
LAN1/2
Controller
.........................................................
47
4
‐
1
‐
8
LAN
Boot
ROM
Controller
............................................................
47
Chapter
5
Software
Installation
............................................................................
47
5
‐
1
VIA
HyperionPro
Driver
........................................................................
47
5
‐
2
VGA
Drivers
..........................................................................................
48
5
‐
3
Audio
Drivers
........................................................................................
49
5
‐
4
LAN
Utility
&
Driver
..............................................................................
49
5
‐
5
Watchdog
Timer
..................................................................................
49
5
‐
6
Programming
RS
‐
485
...........................................................................
53
5
‐
6
‐
1
Initialize
COM
port
.......................................................................
54
5
‐
6
‐
1
Send
out
one
character
(Transmit)
..............................................
54
5
‐
6
‐
2
Send
out
one
block
data
(Transmit
–
the
data
more
than
two
characters)
....................................................................................................
55
5
‐
6
‐
3
Receive
data
.................................................................................
55
5
‐
6
‐
4
Basic
Language
Example
..............................................................
55
Chapter
6
Technical
Reference
.............................................................................
56
6
‐
1
Real
‐
Time
Clock
and
Non
‐
Volatile
RAM
...............................................
56
6
‐
2
CMOS
RAM
Map
..................................................................................
58
6
‐
3
I/O
Port
Address
Map...........................................................................
59
6
‐
4
Interrupt
Request
Lines
(IRQ)
...............................................................
60
6
‐
5
DMA
Channel
Map
...............................................................................
60
6
‐
6
Serial
Ports
...........................................................................................
61
6
‐
7
Receiver
Buffer
Register
(RBR)
.............................................................
62
6
‐
8
Transmitter
Holding
Register
(THR)......................................................
62
6
‐
9
Interrupt
Enable
Register
(IER)
.............................................................
62
6
‐
10
Interrupt
Identification
Register
(IIR)
...................................................
62
6
‐
11
Line
Control
Register
(LCR)
...................................................................
63
6
‐
12
MODEM
Control
Register
(MCR)
..........................................................
63