Chipset
Chapter:
BIOS Settings
Beckhoff New Automation Technology
CB4055
page 67
5.4.1.1.1 PCI Express Root Port
Aptio Setup Utility - Copyright (C) 2012 American Megatrends, Inc.
Chipset
┌─────────────────────────────────────────────────────────────────┬────────────────────────────────┐
│ PCI Express Root Port 2 [Enabled] │Control the PCI Express Root │
│ ASPM Support [Auto] │Port. │
│ URR [Disabled] │ │
│ FER [Disabled] │ │
│ NFER [Disabled] │ │
│ CER [Disabled] │ │
│ CTO [Disabled] │ │
│ SEFE [Disabled] │ │
│ SENFE [Disabled] │ │
│ SECE [Disabled] │ │
│ PME SCI [Enabled] │ │
│ Hot Plug [Disabled] │ │
│ PCIe Speed [Auto] │────────────────────────────────│
│ Extra Bus Reserved 0 │→←: Select Screen │
│ Reserved Memory 10 │↑↓: Select Item │
│ Prefetchable Memory 10 │Enter: Select │
│ Reserved I/O 4 │+/-: Change Opt. │
│ │F1: General Help │
│ │F2: Previous Values │
│ │F3: Optimized Defaults │
│ │F4: Save & Exit │
│ │ESC: Exit │
│ │ │
│ │ │
│ │ │
│ │ │
└─────────────────────────────────────────────────────────────────┴────────────────────────────────┘
Version 2.15.1236. Copyright (C) 2012 American Megatrends, Inc.
PCI Express Root Port x
Options:
Disabled / Enabled
ASPM Support
Options:
Disabled / L0s / L1 / L0sL1 / Auto
URR
Options:
Disabled / Enabled
FER
Options:
Disabled / Enabled
NFER
Options:
Disabled / Enabled
CER
Options:
Disabled / Enabled
CTO
Options:
Disabled / Enabled
SEFE
Options:
Disabled / Enabled
SENFE
Options:
Disabled / Enabled
SECE
Options:
Disabled / Enabled
PME SCI
Options:
Disabled / Enabled