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13
4
IO-Link Interface
Inversion
Inversion of the input signals:
Byte
0
1
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Sub
Index
8
7
6
5
4
3
2
1
16
15
14
13
12
11
10
9
D
e
s
c
ri
pt
ion
In
v
e
rs
ion
P
o
rt
7
P
in
4
In
v
e
rs
ion
P
o
rt
6
P
in
4
In
v
e
rs
ion
P
o
rt
5
P
in
4
In
v
e
rs
ion
P
o
rt
4
P
in
4
In
v
e
rs
ion
P
o
rt
3
P
in
4
In
v
e
rs
ion
P
o
rt
2
P
in
4
In
v
e
rs
ion
P
o
rt
1
P
in
4
In
v
e
rs
ion
P
o
rt
0
P
in
4
In
v
e
rs
ion
P
o
rt
7
P
in
2
In
v
e
rs
ion
P
o
rt
6
P
in
2
In
v
e
rs
ion
P
o
rt
5
P
in
2
In
v
e
rs
ion
P
o
rt
4
P
in
2
In
v
e
rs
ion
P
o
rt
3
P
in
2
I
In
v
e
rs
ion
P
o
rt
2
P
in
2
In
v
e
rs
ion
P
o
rt
1
P
in
2
In
v
e
rs
ion
P
o
rt
0
P
in
2
Inversion Port (x):
0
– Normal
1 - Inverted
Port Direction
Byte
0
1
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Sub
Index
8
7
6
5
4
3
2
1
16
15
14
13
12
11
10
9
De
s
c
ri
pt
ion
D
ire
c
tion
P
o
rt
7
P
in
4
D
ire
c
tion
P
o
rt
6
P
in
4
D
ire
c
tion
P
o
rt
5
P
in
4
D
ire
c
tion
P
o
rt
4
P
in
4
D
ire
c
tion
P
o
rt
3
P
in
4
D
ire
c
tion
P
o
rt
2
P
in
4
D
ire
c
tion
P
o
rt
1
P
in
4
D
ire
c
tion
P
o
rt
0
P
in
4
D
ire
c
tion
P
o
rt
7
P
in
2
D
ire
c
tion
P
o
rt
6
P
in
2
D
ire
c
tion
P
o
rt
5
P
in
2
D
ire
c
tion
P
o
rt
4
P
in
2
D
ire
c
tion
P
o
rt
3
P
in
2
D
ire
c
tion
P
o
rt
2
P
in
2
D
ire
c
tion
P
o
rt
1
P
in
2
D
ire
c
tion
P
o
rt
0
P
in
2
Direction Port (x
)
0
– Input
1
– Output
Fault State Pin
4
Byte
0
1
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Sub
Index
4
3
2
1
8
7
6
5
De
s
c
ri
pt
ion
Fa
u
lt
S
ta
te
P
o
rt
3
P
in
4
Fau
lt
S
ta
te
P
o
rt
2
P
in
4
Fau
lt
S
ta
te
P
o
rt
1
P
in
4
Fau
lt
S
ta
te
P
o
rt
0
P
in
4
Fau
lt
S
ta
te
P
o
rt
7
P
in
4
Fau
lt
S
ta
te
P
o
rt
6
P
in
4
Fau
lt
S
ta
te
P
o
rt
5
P
in
4
Fau
lt
S
ta
te
P
o
rt
4
P
in
4