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27
7
Data mapping
7.4. RX and
RY
signal
details
Profile No.
Signal name
Description
P0
P1 – P5
Direction:
Slave
→
Master (CCL-502
→
PLC)
RXm0
to
RXmF
RXm0
to
RXmF
Input 0 – F
Digital Input signal 0 – F
RX(m+1)0
to
RX(m+1)F
RX(m+1)0
to
RX(m+1)F
Diagnostic input/ output Error on the corresponding input or output line
e.g. over-current, short-circuit, output override
RX(m+2)0
to
RX(m+2)7
RX(m+2)0
to
RX(m+2)7
Diagnostic port
Error on the corresponding port’s power supply line
e.g. over-current, short-circuit
N/A
RX(m+2)8
US undervoltage
US voltage is low, less than 18 Volt
RX(m+2)9
UA undervoltage
UA voltage is low, less than 18 Volt
RX(m+2)8
to
RX(m+2)B
RX(m+3)0
to
RX(m+3)3
IO-Link Channel
established
In IO-Link mode this signal is 1 if an IO-Link device is connected,
and the IO-Link communication is established.
Further, if IO-Link device validation is activated the result of the validation
is indicated by this bit.
RX(m+2)C
to
RX(m+2)F
RX(m+3)8
to
RX(m+3)B
IO-Link Channel
event flag
Event from the connected IO-Link device.
After reading out all event information via message transmission
function, the IO-Link Channel event flag cleared automatically.
N/A
RX(m+4)0
to
RX(m+4)3
IO-Link Channel
PD valid flag
1 if IO-Link device is connected and the IO-Link communication is ok, and
the process data (PD) sent by the device is valid. Note, this flag is
produced by the IO-Link device.
See ‘
Process Data Valid/Invalid Flag
’ in device’s documentation.
Direction:
Master → Slave (PLC → CCL
-502)
RYm0
to
RYmF
RYm0
to
RYmF
Output 0 – F
Digital Output signal 0 – F
RY(m+1)0
to
RY(m+1)F
RY(m+1)0
to
RY(m+1)F
Port direction
When setting the port direction:
bit = 0, the corresponding signal line operates as a digital input,
bit = 1, the corresponding signal line operates as a digital output.
RY(m+2)0
RY(m+2)0
Display Red LED
Setting bit to 1 turns on the red LEDs of the display
RY(m+2)1
RY(m+2)1
Display Green LED
Setting bit to 1 turns on the green LEDs of the display
RY(m+2)2
RY(m+2)2
Display Lock
When set to 1, Preset, Address and Speed settings of the module are
locked and cannot be changed.
RY(m+2)8
to
RY(m+2)B
RY(m+3)0
to
RY(m+3)3
IO-Link Channel
enable
By setting the IO-Link channel enable bit = 1
the corresponding port is operating in IO-Link mode
RY(m+2)C
to
RY(m+2)F
RY(m+3)8
to
RY(m+3)B
IO-Link Channel
event clear
By setting the IO-Link channel event clear bit = 1 all events of the
corresponding IO-Link channel are cleared. By keeping it set to 1
all new events are automatically cleared.
Содержание BNI CCL-502-100-Z001
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