AXIOMTEK SBC84830 Series, Руководство пользователя

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SBC84830 Series All-In-One ECX Board User’s Manual
Award BIOS Utility 36
If enabled, the EPA logo will appear during system booting up; if
disable, the EPA logo will not appear.
4.7 Advanced Chipset Features
Since the features in this section are related to the chipset on the CPU
board and are completely optimized, you are not recommended to
change the default settings in this setup table unless you are well
oriented with the chipset features.
z DRAM Timing Selectable
Use this item to increase the timing of the memory. This is related
to the cooling of memory.
z CAS Latency Time
You can select CAS latency time to HCLKs 2, 3, or Auto. The board
designer should have set up these values in accordance with the
installed DRAM. Do not change these values unless you have to
change the specifications of the installed DRAM or CPU.
z DRAM RAS# to CAS# Delay
When DRAM is refreshed, both rows and columns are addressed
separately. This field lets you insert a timing delay between the
CAS and RAS strobe signals, used when DRAM is written to, read
from, or refreshed.
z DRAM RAS# Precharge
The precharge time is the number of cycles it takes for the RAS to
accumulate its charge before DRAM refresh. If insufficient time is