AXIOMTEK NA342, Руководство пользователя

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NA342 Series Network Appliance U
ser’s Manual
40 LAN Bypass Configuration
LAN Bypass Timer Control Register (0x8E2)
7 6 5 4 3 2 1 0
TEXP X X X X TVAL2 TVAL1 TVAL0
R -- -- -- -- W W W
Default value: 00000000
Bit 7 TEXP (Read Only)
This bit indicates status of hardware timer.
0 Timer has not expired
1 Timer has expired
Bits 6~3 Not used.
Bits 2~0 TVAL2~0
These bits determine the amount of count value in second(s).
001 1 (sec)
010 2 (sec)
011 4 (sec)
100 8 (sec)
101 16 (sec)
110 32 (sec)
111 64 (sec)
000 Timer is not activated.
Writing a value to these bits will reset the hardware timer. The counting process
begins again according to the new written value. Software must write count value
periodically to ensure that timer will never expire. If timer timeout occurs, relay(s)
automatically close to form LAN bypass on selected segment(s) based on the
setting of Power On Bypass Control register (SEGN1).
NOTE: NA342 series support SEGN1 for Lan 3 Lan4 only.
Data (bits 6~0) read back from this register is not defined and therefore must be
ignored. A read operation upon this register should not refresh the hardware timer.