CAPA13S Capa Board
Digital I/O
63
Register 3: Configuration register.
This register configures the directions of the I/O pins. If a bit in this register is set, the
corresponding port pin is enabled as an input with high-impedance output driver. If a bit in this
register is cleared, the corresponding port pin is enabled as an output. At reset, the I/Os are
configured as inputs with a weak pull-up to V
DD
.
Register 3 – Configuration register bit description
Bit
Symbol
Access
Default Value
Description
7
C7
R/W
1
Configures the directions of the I/O pins.
0 = Corresponding port pin enabled as an output.
1 = Corresponding port pin configured as input
(default value).
6
C6
R/W
1
5
C5
R/W
1
4
C4
R/W
1
3
C3
R/W
1
2
C2
R/W
1
1
C1
R/W
1
0
C0
R/W
1
Содержание CAPA13S Series
Страница 1: ...CAPA13S AMD RYZENTM Embedded V1605B V1807B 3 5 Board User s Manual...
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Страница 10: ...CAPA13S Capa Board 4 Introduction This page is intentionally left blank...
Страница 12: ...CAPA13S Capa Board 6 Board and Pin Assignments Bottom View Side View...
Страница 13: ...CAPA13S Capa Board Board and Pin Assignments 7 2 2 Board Layout Top View Rear I O...
Страница 14: ...CAPA13S Capa Board 8 Board and Pin Assignments Bottom View...
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Страница 32: ...CAPA13S Capa Board 26 Hardware Description 3 4 I O Port Address Map...
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Страница 36: ...CAPA13S Capa Board 30 Hardware Description...
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Страница 38: ...CAPA13S Capa Board 32 Hardware Description...
Страница 39: ...CAPA13S Capa Board Hardware Description 33 3 6 Memory Map The memory mapping list is shown as follows...
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Страница 57: ...CAPA13S Capa Board AMI BIOS Setup Utility 51 North Bridge This screen shows system memory information...
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Страница 66: ...CAPA13S Capa Board 60 Watchdog Timer This page is intentionally left blank...