Avnet UltraZed Series, Схема подключения, Страница: 14 / 17

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C C
B B
A A
Avnet Engineering Services
Project Name:
Size:
PCB Rev:
Sheet Title:
Date:
Sheet:
of
11/9/2016
14
SCH-US1CAR
1 02
Variant:
17
Doc Num:
14 - POWER2.SchDoc
B
UltraZed IO Carrier Card
Time:
1:51:55 PM
BOM:
01
+VIN
GND
C121
2.2uF
C123
4.7uF
C122
4.7uF
GND GND_ANA
49.9K
R131
0
R144
GND GND_ANA
10.00K R140
10.00K R137
GND_ANA
C108
47uF C110
47uF C105
1uF C107
1uF
C109
1uF
C111
1uF
+VIN +VIN
GND
+VIN
GND GND
+VIN
GND
C117
1uF
GND
GND
+BOOT_A
+SW_A
+BOOT_B
+SW_B
+BOOT_C
+SW_C
+BOOT_D
+SW_D
C103
0.1uF
+BOOT_A
+SW_A
C114
0.1uF C113
47uF
GND
GND
C116
0.1uF
+BOOT_B
+SW_B
C120
0.1uF
C119
47uF
GND
C124
0.1uF
+BOOT_C
+SW_C
+3.3V
C128
0.1uF
C126
47uF
GND
C127
22uF
C130
0.1uF
+BOOT_D
+SW_D
C134
0.1uF
C132
47uF
GND
C133
22uF
GND_ANA
2
R122
C112
220uF
C118
220uF
C125
220uF
C131
220uF
5A
L4
3.3µH
6A
1.5µH
L5
C140
10000pF
C135
10000pF
2.49K
R139
6.49K R135
SOM_PG_OUT 9[4B]
PMBUS_SDA 9[4A]
PMBUS_SCL 9[5A]
PMBUS_ALERT_N 9[4B]
R141 1.78K
CHA: +0.85V, 2.0A
CHB: +5.0V, 2.0A
CHC: +3.3V, 3.0A
+MGTRAVTT
IRPS POWER SUPPLY
CHD: +1.8V, 4.0A
CH_LDO: +1.8V, 0.3A
+VCCO_1V8
+MGTRAVCC
+5.0V
+3.3V_PRI
+3.3V_PRI
+3.3V_PRI
C142
0.1uF
FB2
C136
0.1uF
10 R133
GND
0 R118
DNP
+AVCC_FB
+AVCC_SFB +AVCC_FB
+AVCC_SFB
FB4
GND
+AVTT_SFB +AVTT_FB
FB3
C138
0.1uF
10 R138
GND
+3V3_SFB
C129
0.1uF
0 R129
+3.3V_PRI
49.9K R123
GND
DNP
FB5
C141
0.1uF
10
R143
GND
+1V8_SFB
+VCCO_1V8_FB
R119 0
R132 0
DNP
+5V_FB
+5V_FB
R125 0
DNP
+3V3_FB
R136
0
DNP
+AVTT_FB
+AVTT_SFB
+MGTRAVTT
R146 0
DNP
R145 0
DNP
+3V3_SFB
+VCCO_1V8_FB
+1V8_SFB
SH4
SHUNT, ECON, PHBR 15 AU,BLACK
V
IN
_
D
1
1
V
IN
_
D
2
2
V
IN
_
D
3
3
BOOT_D
4
PHASE_D1
5
PHASE_D2
6
PHASE_D3
7
PHASE_C1
8
PHASE_C2
9
PHASE_C3
10
BOOT_C
11
V
IN
_
C
1
1
2
V
IN
_
C
2
1
3
V
IN
_
C
3
1
4
FB_C
15
PG_D
16
ALERT#
17
CLK
18
DATA
19
VDDIO
20
1V8
21
V
IN
_
L
D
O
2
2
VO_LDO
23
FB_L
24
PG_L
25
PG_A
26
PG_C
27
EN_L
28
SLEEP#
29
PG_B
30
FB_B
31
V
IN
_
B
3
2
BOOT_B
33
PHASE_B1
34
PHASE_B2
35
PHASE_A1
36
PHASE_A2
37
BOOT_A
38
V
IN
_
A
3
9
RTN_A
40
FB_A
41
EN_A
42
PWM_A
43
EN_B
44
ISEN_A-
45
46
VDRV
47
VCC
48
V
S
U
P
P
L
Y
4
9
AGND
50
EN_C
51
SYNC_CLK
52
EN_D
53
MTP
54
ADDR_PROT
55
FB_D
56
GND
57
IRPS5401MTRPBF
U27
+3V3_FB
MGTRAVCC_SENSE 10[2C]
VCCO_HP_66_SENSE 10[2C]
VCCO_HP_65_SENSE 10[2C]
MGTRAVTT_SENSE 10[3C]
VCCO_HD_26_SENSE 10[3C]
VCCO_HP_64_SENSE 10[3C]
22.1 R130
DNP
GND
R134 1.78K
5A
L2
3.3µH
5A
L3
3.3µH
DNP
R142 649
R191 249
R120
649
R121
649
R126 649
R128
649
R185 649
R186 649
C104
22uF C106
22uF
C137
22uF
C115
22uF
VIN_A VIN_B VIN_C VIN_D
I2C Address Offset = +2,
as set by R141 & R134.
Layout Note:
See Page 13 for
Net Tie layout notes!