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Table 5 – MIO Bank 500 (MIOs 0 to 25)
Bank Pin # Device
Signal
I/O
Notes
500
0 UART1 MIO0_UART1_TX
O UART Header J6
1
MIO1_UART1_RX
I
2 UART0 MIO2_UART0_RX_BT_HCI_TX
I
WL1831 B
3
MIO3_UART0_TX_BT_HCI_RX
O
4 I2C1
MIO4_I2C1_SCL
O I2C Mux
5
MIO5_I2C1_SDA
IO
6 SPI1
MIO6_SPI1_SCLK
O Hi-speed Expansion
Header
7 GPIO
MIO7_WLAN_EN
O WL1831 WiFi enable
8 GPIO
MIO8_BT_EN
O WL1831 BT enable
9 SPI1
MIO9_SPI1_CS
O Hi-speed Expansion
Header
10
MIO10_SPI1_MISO
I
11
MIO11_SPI1_MOSI
O
12 GPIO
MIO12_I2C_MUX_RESET_B
O I2C Mux reset
13 SD0
MIO13_SD0_DAT0
IO SDIO0 Data 0
14
MIO14_SD0_DAT1
IO SDIO0 Data 1
15
MIO15_SD0_DAT2
IO SDIO0 Data 2
16
MIO16_SD0_DAT3
IO SDIO0 Data 3
17 GPIO
MIO17_PS_LED3
O User LED 3
18
MIO18_PS_LED2
O User LED 2
19
MIO19_PS_LED1
O User LED 1
20
MIO20_PS_LED0
O User LED 0
21 SD0
MIO21_SD0_CMD
IO SDIO0 Command
22
MIO22_SD0_CLK
O SDIO0 Clock
23 GPIO
MIO23_GPIO_PB
I
User Pushbutton
24 SD0
MIO24_SD0_DETECT
I
SDIO Card Detect
25 GPIO
MIO25_VBUS_DET
O USB Hub VBUS
