RFSoC Development Kit Getting Started Guide
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3.
Adjust the DAC tile clock to 6389.76 MHz. This sets the sample rate for all 4 DACs in the tile.
Leave ‘Signal Source’ parameters to default values: CW Tone, complex, 0 dBFS, 1 MHz.
Set the complex mixer within the RF-DAC tile to centre-frequency of LTE Band-3, 1842 MHz. The resulting
CW tone will be at 1843 MHz at the output of the DAC.
Set Interpolation = 8.
4.
In the ‘Signal Plot’ panel, set to ‘Frequency’ domain and select ‘DAC Output’. This is useful for
frequency planning by displaying the interpolated signal at the DAC output sampling rate, post-mixer.
Finally press ‘Configure’, then ‘Download’ to transfer the signal data from MATLAB to the DAC memory
buffer of ZCU111.