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3--12
Understanding the Features
Memory Mapping Process
Each OP--440 is assigned 192 bits of PLC user memory which will be used as the
OP-panel database. The ladder logic program must access this assigned OP-panel
memory. Let’s take a closer look at this user memory and how it relates to the
OP-panel features.
As discussed earlier, regardless of which PLC product you are using the base
registers address M+0 through M+11 are formatted the same. In this manual, when
the terms M+0 through M+11 are used, this identifies which base register(s) are
affected for the topic being covered.
Base Address
Manual Reference
Function Description
Top line message selection
M+0
=
M+1
=
M+3
=
M+4
=
M+5
=
M+6
=
Second line message selection
M+2
=
Bottom line message selection
Top line data
Top line data 2
Third line message selection
Second line data
Second line data 2
Third line data
Third line data 2
Bottom line data
Bottom line data 2
M+7
=
M+8
=
M+9
=
M+10 =
M+11 =
PLC user memory is assigned to each panel with the OP--WINEDIT configuration
software. For new OP-panels and add-on applications, the programmer must define
twelve 16 bit registers for PLC interface. Below is a figure showing memory layout for
DL05, DL105, DL205, D3--350, and DL405 PLC’s and uses V2000--V2013 for the
OP--440 panel. See the next page for other PLC product memory usage examples.
Panel No.1
M+0
16 bits
M+1
16 bits
M+2
M+3
M+4
M+5
M+6
16 bits
16 bits
16 bits
16 bits
16 bits
.
You must reserve 192 bits (twelve 16-bit
registers or twenty-four 8-bit registers)
which are used to process data between
the panel and your PLC. You must
configure the
Base
register for the
OP-panel. This base register address is
stored in the OP-panel program.
Total: 192 bits
CPU User’s memory
OP--440 Panel
Data Base
V2000
V2001
V2002
V2003
V2004
V2005
V2006
V2007
V2010
V2011
V2012
V2013
Panel No.1
M+7
16 bits
M+10
M+11
M+12
M+13
16 bits
16 bits
16 bits
16 bits
Total: 192 bits
OP Base
Register Memory
Definition
Operator Panel
Base Memory
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