6
AVR1306
•
Normal
mode.
•
Frequency Generation mode.
•
Single
Slope
PWM.
•
Dual Slope PWM, overflow on TOP.
•
Dual Slope PWM, overflow on TOP and BOTTOM.
•
Dual Slope PWM, overflow on BOTTOM.
3.8.1 Normal Mode
In Normal Mode, the counter will count in the direction set by the DIR bit in CTRLF for
each clock until it reaches TOP set by PER[H:L] or BOTTOM (zero). When TOP is
reached when up-counting the counter will be set to zero when the next clock is
given. If the TC is down-counting the value will wrap around to the value in PER[H:L]
after reaching BOTTOM.
Figure 3-2.
Normal mode with period setting.
Time
Ti
m
e
r value
TOP
TOP
TOP
As shown in Figure 3-2, changing the counter value while the counter is running is
allowed. The write access has higher priority than count, clear, or reload and will be
immediate. However, if the value written is outside the BOTTOM-TOP boundary the
counter either has to count down until TOP is reached or count up until wraparound
(passing MAX) for the timer to re-stabilize to the period time.
This mode of operation must be used when using the Timer/Counter for Input
Capture.
3.8.2 Frequency Generation Mode
There is little difference between the frequency waveform generation mode (FRQ)
and the normal mode of operation. For FRQ the period (T) is controlled by the
CCA[H:L] register instead of PER[H:L], which in this case is not in use. In addition the
Waveform Generation (WG) output is toggled on each compare match between
CNT[H:L] and CCA[H:L] as shown in Figure 3-3.
8045A-AVR-02/08