Atmel AVR ATICE10, Руководство пользователя

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Using the ICE10
3-4 AVR
®
ATICE10 User Guide
There are three global mask registers that are used to control the behavior of the
triggers:
The Trigger Output Global Mask Register controls which of the output pins are
allowed to be controlled by the trigger settings in the code. An output pin that is
disabled will remain low even if a trigger point for that particular pin is set in the code.
The Trigger Input Global Mask Register controls which of the input pins are allowed to
break the emulator. If more than one line is enabled, the emulator will break on either
one, but will not store any information about which input caused the event. Note that
unconnected inputs are pulled high by internal pull-up resistors. Unused lines must
not be enabled.
The External Trace Mask Register controls which of the input pins will be stored in the
trace memory. Input pins that are not enabled in this register will be stored as zero in
the trace memory. To be traced, input signals must be valid and stable at the rising
edge of the AVR clock and for 50 ns thereafter. It is also necessary that the trace
buffer is enabled.
The trigger input and the external trace are two independent functions acting on the
same input pins. Note that the trigger logic is asynchronous and edge driven, whereas
the trace logic is clocked on the AVR clock. The emulator may therefore break on a
glitch signal that is too narrow to be traced.
The details on how to enable and set up triggers and mask registers are presented in
“AVR Studio On-line Help”.
Table 3-1. Pinout for Aux Connector
Signal Aux Signal
GND Pin 1 Pin 2 GND
Input 0 Pin 3 Pin 4 Output 0
Input 1 Pin 5 Pin 6 Output 1
Input 2 Pin 7 Pin 8 Output 2
Input 3 Pin 9 Pin 10 Output 3
Input 4 Pin 11 Pin 12 Output 4
GND Pin 13 Pin 14 GND