Using System Designer
4-16
FPSLIC STK594 User Guide
2819D–FPSLI–11/04
4.10.2
Software Setup
The CPS utility allows for the programming, reading, and verification of data. CPS sup-
ports Atmel’s AT17F, ATFS and AT17LV series of configuration memories.
1.
Launch CPS from Start > All Programs > Atmel > CPS8.xx (where xx represents
the version).
Figure 4-20. CPS
2.
Select /P: Partition, program, and verify from an Atmel file under Procedure.
3.
Select
FPSLIC_COUNTER.BST
under Input File by browsing to
C:\SystemDesigner\Designs\stk594
.
4.
Select
OUT.BST
under Output File.
5.
Select AT17LV010(A) (1M) under Device.
6.
Select Low under Reset Polarity.
7.
Select AT40K/Cypress under FPGA Family.
8.
Select LPT1 under COMM Port (assuming LPT1 is the parallel port connected to
the ATDH2225 programming adapter).
9.
Select Slow under Data Rate.
10. Select Low under A2 Bit Level.
11. Press Start Procedure. When finished a statistics report will be provided in the
CPS log window.
Note:
If the CPS utility is being launched for the first time, the clock calibration dialog
will be displayed. Press Yes to proceed with calibration and select High for
accurate calibration. The Checksum is the number of data bits found in the BST
file, and it can be used to check if the data is corrupted during programming.
Содержание FPSLIC STK594
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