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Using System Designer
4-10
FPSLIC STK594 User Guide
2819D–FPSLI–11/04
4.7
AVR-FPGA
Interface
The AVR-FPGA Interface dialog provides a means for making the connections between
the embedded FPGA and AVR microcontroller.
1.
Press the AVR-FPGA Interface button.
2.
Select counter and press OK when prompted for Top-Level Entity. The Select
Ports dialog appears, see Figure 4-14.
Figure 4-14. Select Ports Dialog
3.
Select the AVRIoSelects tab on the right-hand side of the dialog box.
4.
Select the LOAD signal from the Input Design Ports and then select IOSELA0
from the AVRIoSelects.
5.
Press Connect to connect the counter's LOAD signal to FPGA-AVR I/O Select 0.
6.
Connect the remaining inputs and outputs as shown in Table 4-2.
7.
Uncheck Generate Template Test Bench File on the bottom left-hand side of the
Select Ports dialog. Since we are not performing co-verification, it is not neces-
sary to generate the pre-layout test bench file.
8.
Press OK.
Table 4-2. FPGA-AVR Interface Connections
FPGA I/O
FPGA-AVR I/O
Select Ports Tab
LOAD
IOSELA0
AVRIoSelects
RCO
INTA0
FPGAInterrupts
D(7:0)
ADINA(7:0)
DataFromAVR
aWE
FIOWEA
AVRControls
Clock
GCLK5
FPGAClocks
Содержание FPSLIC STK594
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