PXIe-1209 User Manual
Publication No. 981050 REV. A
Identification and Configuration Registers 6-8
Astronics Test Systems
Double Pulse Spacing - Low
PXIe-
1209
Reg.1C
Bit
15
14
13
12
11
10 9 8 7 6 5 4 3 2 1 0
Write
15
Low Order Bits
0
Read
15
Low Order Bits
0
Double Pulse Spacing - Mid
PXIe-
1209
Reg.1E
Bit
15
14
13
12
11
10 9 8 7 6 5 4 3 2 1 0
Write
31
Middle Order Bits
16
Read
31
Middle Order Bits
16
Double Pulse Spacing - High
PXIe-
1209
Reg. 20
Bit
15
14
13
12
11
10 9 8 7 6 5 4 3 2 1 0
Write
Not Used
39
High Order Bits
32
Read
0
39
High Order Bits
32
Notes:
1. Each bit represents 10ps with 0 equal to 0ns.
2. The value must be greater than the Pulse Width + 1ns and less than the pulse period – the
pulse width – 1ns.
3. The registers must be written in the order low, mid., and then high. The new pulse delay does
not take effect until the high order register is written.
Содержание PXIe-1209
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