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OMNIBUS II PXIE SPECIFIC FEATURES

5.2 PXIe Trigger Access

The following table shows the PXIe Trigger signals supported by the OmniBus II
PXIe  card.  All  signals  are  asynchronous  to  either  CLK10  or  CLK100.  PXIe
Trigger  signals  can  be  accessed  through  the  BTICard_ExtDIORd,
BTICard_ExtDIOWr,  and  BTICard_ExtDIOEnWr  functions  by  passing  in  the
associated

dionum

per Table 5.1. These signals can also be monitored using

BTICard_ExtDIOMonConfig with

banknum

and

rise_edge

/

fall_edge

bits per

Table 5.1. For more information on these functions, refer to the API manuals
(e.g.,

MIL-STD-1553 Programming Manual for BTIDriver-Compliant Devices

).

Signal

Direction

API

dionum

API

banknum

API

rise_edge /

fall_edge

PXI_TRIG[0]

I/O

33

2

0x0001

PXI_TRIG[1]

I/O

34

2

0x0002

PXI_TRIG[2]

I/O

35

2

0x0004

PXI_TRIG[3]

I/O

36

2

0x0008

PXI_TRIG[4]

I/O

37

2

0x0010

PXI_TRIG[5]

I/O

38

2

0x0020

PXI_TRIG[6]

I/O

39

2

0x0040

PXI_TRIG[7]

I/O

40

2

0x0080

PXIe_DSTARA

In

41

2

0x0100

PXIe_DSTARB

In

42

2

0x0200

PXI_STAR

I/O

43

2

0x0400

PXIe_DSTARC

Out

44

2

0x0800

Table 5.1—PXIe Trigger Signals

All bi-directional (I/O) signals default to tri-state mode at power-on. They can be
tri-stated, driven high, or driven low with BTICard_ExtDIOEnWr. To drive the
signal, set

dioen

to TRUE. To tri-state the signal, set

dioen

to FALSE. Note that

dioval

is ignored when tri-stating with this function.

Only one core can drive a particular bi-directional signal at a time. If both cores
are driving the same trigger, the value most-recently written will be driven on the
trigger. For example, if Core A is configured to drive PXI_TRIG[0], then Core B
is configured to drive the same PXI_TRIG[0], the value written to Core B will be
driven on PXI_TRIG[0]. Ensure that other cards in the system do not cause a
conflict by driving a bi-directional signal at the same time as the PXIe card.

PXIe_DSTARC  behaves  differently  than  the  other  PXIe  trigger  signals.  When
PXIe_DSTARC is enabled, the PXIe card drives a continuous 10MHz signal at
50%  duty-cycle  on  this  trigger.  The  PXIe_DSTARC  10MHz  output  can  be
enabled  by  calling  BTICard_ExtDIOEnWr  on

dionum

44 with

dioen

set to

TRUE, and disabled by calling BTICard_ExtDIOEnWr on

dionum

44 with

dioen

set to FALSE. Note that this signal cannot be tri-stated.

5.3 Protocol Sync and Trigger Support

Protocols with Sync and Trigger support (e.g. BTI1553) can interface with the
PXIe Trigger signals by using the

SyncDefine

or

TriggerDefine

functions (e.g.

BTI1553_BCSyncDefine, BTI429_ChTriggerDefine, etc). Refer to Table 5.2 for
mappings between protocol triggers (Trigger A-C) and PXIe Triggers (PXI*).

5-2

OmniBus II PCIe/PXIe User’s Manual

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Содержание OmniBusII

Страница 1: ...ERFACE CARD to AVIONICS DATABUSES February 6 2015 Rev B0 Copyright 2014 2015 by Ballard Technology Inc MA203 20150206 Rev B0 Astronics Ballard Technology Phone 1 425 339 0281 800 829 1553 Email suppor...

Страница 2: ......

Страница 3: ...or application INTERFERENCE This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions manual may cause interference to rad...

Страница 4: ......

Страница 5: ...ed Software 3 2 4 OMNIBUS II FEATURES 4 1 4 1 PCI Express Bus 4 1 4 2 Built in Test 4 1 4 3 IRIG Timer 4 2 4 4 Core Discretes 4 3 4 5 Avionics Discretes 4 4 4 5 1 Shunt Inputs 4 5 4 5 2 Shunt Input Co...

Страница 6: ...t Amplitude 6 6 6 6 ARINC 717 Modules 6 7 6 6 1 Variable Transmit Amplitude 6 7 7 CONNECTOR PINOUTS 7 1 7 1 Interface Connector 7 1 7 2 General Pinout 7 1 7 3 Module Specific Wiring 7 2 7 3 1 MIL STD...

Страница 7: ...4 Transitional Protocol Trigger Parameters 5 4 Table 5 5 PXIe Status Parameters 5 4 Table 6 1 OmniBus II PCIe Host Part Numbering 6 1 Table 6 2 OmniBus II PXIe cPCIe Host Part Numbering 6 1 Table 6 3...

Страница 8: ...TABLE OF CONTENTS This page intentionally blank iv OmniBus II PCI PXIe User s Manual...

Страница 9: ...ternatives 1 1 OmniBus II Overview OmniBus is a family of products that enable computer systems to communicate with avionics databuses for the purpose of testing simulation and or operation Each OmniB...

Страница 10: ...igh channel count and mixed protocol capabilities can be fully exploited without the risk of overloading the host computer s processor IRIG and special timing circuits allows channels boards and compu...

Страница 11: ...ctory The assembly part number characterizes the configuration of an OmniBus prod uct The assembly part number is designated by groups of characters separated by dashes The first group of characters i...

Страница 12: ...pulse Doppler weather radar system for commercial aircraft The Transmitter Receiver unit sends data over the 708 display databus to the Control Display Unit Data consists of 1600 bit words that are p...

Страница 13: ...ose hours We invite your questions and comments on any of our products You may reach us by telephone at 800 829 1553 or 425 339 0281 by fax at 425 339 0915 on the Web at www ballardtech com or through...

Страница 14: ...INTRODUCTION This page intentionally blank 1 6 OmniBus II PCIe PXIe User s Manual...

Страница 15: ...es 2 1 Step 1 Insert the Card into the System In an ESD safe environment do the following For a PCIe System Shut down the system Insert the card into an empty PCIe slot Secure the card with a screw R...

Страница 16: ...a host computer The driver installation procedures vary depending on your computer s operating system These procedures are kept on disk so they can be easily updated as oper ating systems evolve Befor...

Страница 17: ...out each device such as card number configuration serial number and assembly part number Running the test sequence verifies both the device hardware and the interface between the device and the comput...

Страница 18: ...INSTALLATION This page intentionally blank 2 4 OmniBus II PCIe PXIe User s Manual...

Страница 19: ...am that features a user friendly GUI Graphical User Interface and many timesaving features For example bus messages can be automatically detected posted in the hardware tree and associated with the ap...

Страница 20: ...ction calls a program can operate OmniBus products and process messages to and from the avionics databus Functions include rou tines for transmitting receiving scheduling recording data manipulation a...

Страница 21: ...oard form factor The card utilizes a single lane x1 PCIe interface through the standard PXIe x8 connector All power is supplied through the PXIe connectors with no external power source required For m...

Страница 22: ...em monitor architecture 4 3 IRIG Timer An IRIG time signal contains a human readable binary coded decimal BCD time value in days hours minutes seconds etc and can be used to synchronize many devices T...

Страница 23: ...ignals Input impedance min 12 k Input voltage max 7 5V to 12 5V volts Input level threshold API Controlled 0V 5V Output level 0 to 5 volts Output drive capability 20 mA Table 4 3 Electrical characteri...

Страница 24: ...combinations of these lines Refer to the BTIDriver software manuals for more information on programming these discretes and their use as syncs and triggers Table 4 5 below shows the correlation betwe...

Страница 25: ...by an identi cal configuration This results in a 3 25 volt switching voltage Figure 4 2 OmniBus II Discrete Shunt Input Circuit 4 5 2 Shunt Input Considerations Limits The OmniBus II discrete shunt in...

Страница 26: ...niBus II discrete shunt output circuits contain current limiting and thermal shutdown features If a user attempts to sink too much current through an output discrete circuit the output will begin curr...

Страница 27: ...0 Avionics DIO 0 7 BUS4P 17 ADIO1 Avionics DIO 1 6 BUS4N 18 ADIO2 Avionics DIO 2 24 BUS5P 19 ADIO3 Avionics DIO 3 25 BUS5N 20 ADIO4 Avionics DIO 4 9 BUS6P 21 ADIO5 Avionics DIO 5 8 BUS6N 22 ADIO6 Avio...

Страница 28: ...OMNIBUS II FEATURES This page intentionally blank 4 8 OmniBus II PCIe PXIe User s Manual...

Страница 29: ...stem which does not support the PXIe_CLK100 input The clock can be selected prior to applying power by sliding the yellow switch SW1 as shown below The switch setting is sampled once at power on to gu...

Страница 30: ...ve the signal set dioen to TRUE To tri state the signal set dioen to FALSE Note that dioval is ignored when tri stating with this function Only one core can drive a particular bi directional signal at...

Страница 31: ...e 5 2 PXIe Trigger to Protocol Trigger Mapping Protocol Sync PXIe Signal Sync Mask Parameter A PXI_TRIG 0 SYNCMASK_PXITRIGA B PXI_TRIG 1 SYNCMASK_PXITRIGB C PXI_TRIG 2 SYNCMASK_PXITRIGC PXI_STAR SYNCM...

Страница 32: ...trigger line B TRIGPOL_TRIGBF Sets active on falling edge of trigger line B TRIGPOL_TRIGBR Sets active on rising edge of trigger line B C TRIGPOL_TRIGCL Sets active low polarity for trigger line C TRI...

Страница 33: ...ng Slot These slot types will be marked on the system chassis with one of the three Glyphs from replaced with chassis slot number Figure 5 2 Note that while the PXIe card will operate normally in the...

Страница 34: ...OMNIBUS II PXIE SPECIFIC FEATURES This page intentionally blank 5 6 OmniBus II PCIe PXIe User s Manual...

Страница 35: ...iBus II PCIe card can host up to two modules one per core OmniBus II PCIe carrier boards are listed in the table below Part No Description 211 Reserved 212 OmniBus II PCIe w 2 cores Table 6 1 OmniBus...

Страница 36: ...P Level Number used in Part No 1 4 5 Number of Simultaneous Terminals 1 32 32 Configurable RT Response Time Monitor Filtering for terminal address Filtering for subaddress Concurrent terminal monitori...

Страница 37: ...l now allows for setting a high and a low range The lower 12 bits of dacval represent the transmit amplitude The OmniBus II has a resolution of 8 bits so the least significant 4 bits are don t cares T...

Страница 38: ...6 8R 0T 427 4R 4T 428 0R 8T 434 4R 4T Amplitude Frequency 435 4R 4T Amplitude Frequency 438 8R 8T Amplitude Frequency R receive and T transmit Also includes ARINC 717 channels Table 6 8 ARINC 429 Modu...

Страница 39: ...9 sec 100 nsec Slew rate limit 40V sec Differential Differential and must be between the waveform high and low Table 6 9 ARINC 429 Parametric Waveform Characteristics 6 4 2 Configurable Frequency Para...

Страница 40: ...hen the bus is transformer coupled the direct coupled termination resistance must be off and external couplers and terminators are required See Appendix A for more information about bus termination an...

Страница 41: ...els as described in Section 6 4 All Omni Bus ARINC 717 channels are capable of operating at 64 128 256 512 1024 2048 4096 and 8192 wps and may be software configured as biphase or bipolar All transmit...

Страница 42: ...MODULE CONFIGURATIONS This page intentionally blank 6 8 OmniBus II PCIe PXIe User s Manual...

Страница 43: ...erface connector on OmniBus II products is a Molex 60 pin LFH re ceptacle Molex PN 70928 2000 The recommended mating connector is a cable plug assembly consisting of a frame subassembly Molex PN 70929...

Страница 44: ...S7N 53 BUS15N 12 24 BUS5P 27 54 BUS13P 25 BUS5N 55 BUS13N 13 26 BUS3P 28 56 BUS11P 27 BUS3N 57 BUS11N 14 28 BUS1P 29 58 BUS9P 29 BUS1N 59 BUS9N 15 30 GND 30 60 GND 1 GND 31 GND Table 7 1 General pin d...

Страница 45: ...59 P3 14 BUS9N CH1AX BUS A transformer coupled 16 33 P3 3 BUS8P CH1AXR BUS A transformer coupled 16 32 P3 15 BUS8N CH1BD BUS B direct coupled 17 35 P3 4 BUS10P CH1BDR BUS B direct coupled 17 34 P3 16...

Страница 46: ...P CH7N 11 23 P2 21 BUS7N R T T n a T CH8 CH8P 16 33 P3 3 BUS8P CH8N 16 32 P3 15 BUS8N R T T T CH9 CH9P 29 58 P3 2 BUS9P CH9N 29 59 P3 14 BUS9N R T T T CH10 CH10P 17 35 P3 4 BUS10P CH10N 17 34 P3 16 BU...

Страница 47: ...irect coupled 29 59 P3 14 BUS9N BUS A transformer coupled 16 33 P3 3 BUS8P BUS A transformer coupled 16 32 P3 15 BUS8N BUS B direct coupled 17 35 P3 4 BUS10P BUS B direct coupled 17 34 P3 16 BUS10N BU...

Страница 48: ...se bipolar CH5 12 24 P2 8 BUS5P 12 25 P2 19 BUS5N R biphase bipolar R biphase bipolar CH6 4 9 P2 9 BUS6P 4 8 P2 20 BUS6N R biphase bipolar R biphase bipolar CH7 11 22 P2 10 BUS7P 11 23 P2 21 BUS7N T b...

Страница 49: ...assembly 7 4 2 PN 16036 Cable Assembly LFH to Two 25 pin D subs This is a three foot long Y cable that adapts a 60 pin male LFH plug labeled P1 to two 25 pin male D subminiature connectors P2 and P3 B...

Страница 50: ...18 BUS12N 6 24 8 BUS5P 6 54 8 BUS13P 6 25 19 BUS5N 6 55 19 BUS13N 7 9 9 BUS6P 7 39 9 BUS14P 7 8 20 BUS6N 7 38 20 BUS14N 8 22 10 BUS7P 8 52 10 BUS15P 8 23 21 BUS7N 8 53 21 BUS15N 9 11 11 CDIO0 9 41 11...

Страница 51: ...nector to a PL 75 for each of the transformer coupled MIL STD 1553 buses All channels are dual redundant so there are either two or four twinax cables with PL 75s on each assembly Twinax cables are wi...

Страница 52: ...Name From LFH Pin To DB25S Pin 1 CDIO0 11 1 1 GND 10 14 2 CDIO1 21 2 2 GND 20 15 3 CDIO2 51 3 3 GND 50 16 4 CDIO3 41 4 4 GND 40 17 5 CDIO7 43 6 5 GND 42 19 6 CDIO4 13 7 6 GND 12 20 7 CDIO5 19 8 7 GND...

Страница 53: ...is an improperly terminated databus A 2 Transformer versus Direct Coupling MIL STD 1553 can be either direct or transformer coupled Most military MIL STD 1553 systems are transformer coupled ARINC 70...

Страница 54: ...COUPLING AND TERMINATION Figure A 1 Transformer coupling to a dual redundant databus A 2 OmniBus II PCIe PXIe User s Manual...

Страница 55: ...irect connection to a dual redundant databus Bus A Bus B 78 78 78 78 UNIT UNDER T ES T S T UB A S T UB B T RANS CEIVER A T RANS CEIVER B T erminal T EEADAPT ERS BTP N 17002 T ERMINAT ORS BTP N 17001 O...

Страница 56: ...COUPLING AND TERMINATION This page intentionally blank A 4 OmniBus II PCIe PXIe User s Manual...

Страница 57: ...HISTORY The following revisions have been made to this manual Rev A Date March 27 2014 Initial release of this manual Rev B0 Date Februrary 6 2015 Added updates for OmniBus II PXIe OmniBus II PCIe PXI...

Страница 58: ...REVISION HISTORY This page intentionally blank B 2 OmniBus II PCIe PXIe User s Manual...

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