Artesyn SharpStreamer Pro PCIE-7210, Инструкция по установке и эксплуатации, Страница: 125 / 140

PCIE Software
SharpStreamer™ Pro PCIE-7210 Installation and Use (6806800U29B)
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Related package : pcie-mcpu-basetnet and pcie-netif-rename
7.7.1 Backplane Interfaces
7.7.1.1 Onboard Niantic
MaxCore has an on-board dual-port 10G Niantic device, which is used for default networking
connectivity. Each port can share up to 40 VFs for device assignment to aCPUs. This device is
located in Slot 16, which is not accessible to user directly. External traffic is reach to this device
via the IO module through ETH3 and ETH4 interfaces.
7.7.2 BCM switch
MaxCore has an on-board BCM switch that as x 1G and 2x 10G ports. Each slot has a direct
connectivity to two 1G ports and the two10G ports are connected to external network.
7.7.3 mCPU
By default, PFs of all device cards are visible on mCPU. Backplane Niantic PFs are visible as ETH3,
ETH4 interfaces. If a PCIE-9205 card is available in one of the slots, then a bridge is created
between PEP0 interface and ETH3 and will provide a combined local network for the chassis.
Any additional 9205 PEP0 interface will be part of this bridge. ETH3 device is set to
internal
loopback and each aCPU gets one VF assigned from this device. Due to internal loopback mode
on ETH3, this interface cannot be used to connect to an external network. Remaining end-
device PF names follow the OS distribution specific naming convention.
The following IP addresses are assigned by default to ETH3 and ETH4 interfaces.
Table 7-3 ETH3 and ETH4 IP Address Assignment
Interface IP Address
ETH3 172.27.<chassis_id>.2
ETH4 172.26.<chassis_id>.2