
Functional Description
PCIE-6001 Installation and Use (6806800U73A)
39
3.4
Temperature Sensors
To ensure the board will operate at safe temperatures, the PCIE-6001 has a pair of LM75A
temperature sensors (at the inlet and outlet) along with an ADT7461A which provides the
internal PEX die temperature. These sensors cannot be directly accessed via the upstream host
processor, but can be accessed via a CPLD register. Also, there are typically temperature
sensors built into each M.2 AHCI or NVME SSD module.
shows the location of the temperature sensors on the card.
3.5
Clock Distribution
The PCIE-6001 utilizes the PCI Express common clock architecture with the upstream host
providing the reference clock. A low-jitter fanout buffer is used to provide this clock to the PEX
and each M.2/NGFF socket. A 32.768kHz PCI Express suspend clock is generated on-board and
provided to each M.2/NGFF socket.
3.6
Reset Control
In addition to responding to the PCI Express fundamental reset, each installed M.2 AHCI/NVME
SSD module can be individually controlled via the NVMe Reset Status/Control register.
Figure 3-3
Location of Temperature Sensors
M.2
SOCKET 1
M.2
SOCKET 2
M.2
SOCKET 3
M.2
SOCKET 4
Outlet sensor
Inlet sensor
Содержание 6806800U73A
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