Array electronic AF-10MR-A, Руководство пользователя

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FAB I
ntelligent
C
ontroller r
3.2.2 DDR
Line diagram/Symbol in
FAB
Pin Description
Input TRG
Turn on the timer of the time-delay off re-
lay when the input TRG (trigger) is at the
descending edge (changing from 1 to 0)
Input R
The timer of disconnecting time-delay re-
lay is reset via R (Reset Input), and Output
Q is set to 0. (R takes priority over TRG).
Parameter
T
The output is disconnected (the Q status
is changed from 1 to 0) when the time T is
over.
Output Q
Input TRG is activated then the output is
turned on (Q=1) and is kept ON until it is
reset when the set time T is up.
Time Sequence Frame:
Description:
1. When Input TRG is at Status 1, Output Q changes at once to Status 1. When
Input TRG changes from 1 to 0 (i.e. the descending edge comes), the internal
time delay timer of FAB is activated and the Output Q still remains at Status 1.
When the set time T is over, Output Q becomes 0 and the timer is reset.
TRG
Q
R
T
T
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