3-10
Table 6 - The J7 Connector pin assignment
PIN NO.
DIRECTION
SIGNAL NAME
1
Output
Data Carrier Detect (shorted to 4 & 6)
2
Output
Receive data
3
Input
Transmit data
4
Input
Data Terminal Ready (shorted to 1 & 6)
5
Signal Ground
6
Output
Data Set Ready (shorted to 1 & 4)
7
Input
Request to Send
8
Output
Clear to Send
9
Not Used
3.7.3.
Logical Analyzer connectors LA1-5 and Processor Expansion Bus J8 & J9
All the processors signals are available on 5 mictor connectors LA1-5. User may refer to the data sheets
for the major parts and the schematic at the end of this manual to obtain an accurate loading capability. A
subset of the signals are available on J8 and J9 for easier access. Tables 7-14 show the pin assignment for
J8, J9, LA1, LA2, LA3, LA4 and LA5 respectively.
Table 7 - The J8 Connector pin assignment
PIN NO.
SIGNAL NAME
PIN NO.
SIGNAL NAME
1
TIN1
2
TT0_PP0
3
TOUT1
4
TT1_PP1
5
TIN0
6
TM0_PP2
7
TOUT0
8
TM1_PP3
9
SCL
10
TM2_PP4
11
SDA
12
DREQ1_PP5
13
/IRQ1
14
DREQ0_PP6
15
/IRQ5
16
XTIP_PP7
17
/CS0_HEADER
18
A24_PP8
19
/BWE0
20
A25_PP9
21
/BWE1
22
A26_PP10
23
/BWE2
24
A27_PP11
25
/BWE3
26
A28_PP12
27
/OE
28
A29_PP13
29
/CS4
30
A30_PP14
31
/CS5
32
A31_PP15
33
/RTS0
34
GND
Содержание SBC5307
Страница 15: ...1 8 J1 J4 J7 J8 J9 JP1 J2 Figure 4 Jumper and connector placement ...
Страница 20: ...2 3 Figure 5 Flow Diagram of dBUG Operational Mode ...
Страница 26: ...2 9 0x00012002 nop 0x00012004 lsr l 1 d0 0x00012006 cmp 4 d0 0x00012008 beq start 0x0001200A ...
Страница 79: ...9 APPENDIX C Schematics ...