User's Manual
4.
CONFIGURATION EXAMPLES
The examples below show typical conversion setups with their confguration of the ASRC
inputs, outputs, possible async clock sources and typical routings.
Although the "Routing" matrix examples show only conversions involving
the ASRC, more conversions can run at the same time:
An arbitrary number of additional conversions within the main clock
domain can run in parallel.
Any ASRC'ed input can additionally be routed to an arbitrary number of
outputs in the main clock domain.
4.1.
Typical Setups
Setup
<=> bidirectional
=> unidirectional
Step 1:
ASRC input
"Which input comes
async and should go
through the ASRC?"
Step 2:
ASRC output
"Which output
should run at the
ASRC samplerate?"
Step 3:
ASRC clock source
"From where should
the ASRC take its
clock?"
Step 4:
Routing
"Which input should
go to which output?"
You can add
additional routings
as required!
AES50 48ch/96kHz
<=>
Dante 48ch/48kHz
Use "MT" port in
AES50 mode, see
multiverter Manual
AD MO MC MT AE DA EX
AD
MO
MC
MT
O O O O O O O
AE
O O O O O O O
DA
EX
AD MO MC MT AE DA EX
AD
O O
MO
O O
MC
O O
MT
O O
AE
O O
DA
O O
EX
O O
AE
MT
WCLK
INT
AD MO MC MT AE DA EX
AD
MO
MC
MT
O
AE
O
DA
O O
EX
MADI optical
32ch/96kHz
<=>
Dante 32ch/48kHz
AD MO MC MT AE DA EX
AD
MO
O O O O O O O
MC
MT
AE
DA
EX
AD MO MC MT AE DA EX
AD
O
MO
O
MC
O
MT
O
AE
O
DA
O
EX
O
MO
WCLK
INT
AD MO MC MT AE DA EX
AD
MO
O
MC
MT
AE
DA
O
EX
MADI
MADI coaxial
64ch/96kHz
<=>
Dante 64ch/48kHz
AD MO MC MT AE DA EX
AD
MO
O O O O O O O
MC
O O O O O O O
MT
AE
DA
EX
AD MO MC MT AE DA EX
AD
O O
MO
O O
MC
O O
MT
O O
AE
O O
DA
O O
EX
O O
MO
MC
WCLK
INT
AD MO MC MT AE DA EX
AD
MO
O
MC
O
MT
AE
DA
O O
EX
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