F
F
o
o
r
r
t
t
r
r
e
e
s
s
s
s
7
7
7
7
0
0
0
0
/
/
7
7
9
9
0
0
0
0
O
O
n
n
l
l
i
i
n
n
e
e
M
M
a
a
n
n
u
u
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l
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3.10.2.3 PCI
PCI
Enabled (Default)
Disabled
PCI or Peripheral Component Interconnect is a 32-bit bus that
can run at clock speeds of 33 MHz. This parameter monitors the
activity of this bus when set to enabled.
3.10.3 Event Process
3.10.3.1 Action After Critical Event
Action After
Critical Event
NMI (Default)
Power Cycle
Reset
This parameter allows you to select the action after BIOS finds a
critical event. The critical events include multiple bits ECC error
and PCI device error.
3.10.3.2 POST Error Stop
Post Error Stop
Enabled (Default)
Disabled
BIOS checking the bad CPUs and memory modules during
POST. When this parameter is enabled, BIOS will stop POST
operation whenever it finds a bad CPU or memory. Otherwise, if
disabled the system will continue running.
116
Open
A
