AOpen AP5V, Руководство пользователя

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AMI BIOS Utility
3-17
SDRAM CAS# LATENCY
*
This parameter controls the wait state between SDRAM row address, strobe
and SDRAM CAS signals.
SDRAM RAS# TIMING *
This parameter controls the RAS# precharge, RAS# active-to-precharge time,
and refresh-to-RAS# active signal delay.
8-bit I/O Recovery Time (Sysclk)
This parameter allows you to set the response time of the 8-bit I/O devices
connected to your system. The settings range from
1-8 SYSCLK
and
Disabled
.
16-bit I/O Recovery Time (Sysclk)
This parameter allows you to set the response time of the 16-bit I/O devices
connected to your system. The settings range from 1-4 SYSCLK d and
Disable
.
ISA Clock Divisor
This option specifies the ISA bus clock divisor. The selections are
PCICLK/4
and
PCICLK/3
.
Peer Concurrency
Enable the parameter to allow the CPU to run secondary DRAM PCI master
cycles to target PCI peer devices. Select Disabled to hold the CPU bus.
The default setting is
Disabled
.
*
This parameter is nonconfigurable.