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UG-1444 

EVAL-ADHV4702-1CPZ 

User Guide 

 

Rev. 0 | Page 4 of 10 

SHUTDOWN FEATURE (SDN CONNECTOR) 

The SD pin of the 

ADHV4702-1

 can be jumped to logic high, 

logic low, or can be left floating via the SDN connector on the 
EVAL-ADHV4702-1CPZ evaluation board.  
The SD pin is left floating at the SDN connector as shipped 
from the factory, enabling the amplifier. Pulling the SD pin low 
to DGND places the amplifier in a power saving shutdown 
mode. When turning the amplifier back on from the shutdown 
state, float the SD pin or pull it high.  

INPUT CLAMPING DIODES 

To protect the amplifier from high dynamic power dissipation, 
the EVAL-ADHV4702-1CPZ evaluation board is configured by 
default with input clamping diodes (D6 and D7) that clamp the 
input differential voltage of the 

ADHV4702-1

 at a two-diode 

forward bias voltage. This input clamping network limits the 
drive to the slew boosting circuit, which affects dynamic perfor-
mance such as bandwidth and slew rate. The recommended 
part number for the input clamping diodes is SBAV199LT1G.  
Removing the input clamping diodes allows the slew boosting 
circuit to be fully biased, which maximizes slew rate and 
improves settling time significantly. The fully biased slew 
boosting circuit requires additional supply current and results 
in higher power dissipation during slewing. For reliable 
operation, always operate the amplifier within the safe 
operating area curve and provide additional heat sinking as 
required for the application. Refer to the 

ADHV4702-1

 data 

sheet for more information. 

INPUT GUARD RING 

The EVAL-ADHV4702-1CPZ evaluation board employs an 
electrostatic guard ring on the top layer to reduce printed 
circuit board (PCB) surface leakage currents. The guard ring 
encircles the noninverting input and must be biased at the same 
voltage as the input. The guard ring can be biased using a 
voltage source at P3 or connected to the noninverting input by 
installing a 0 Ω resistor at R10. Remove the input clamping 
diodes (D6 and D7) to ensure the complete enclosure of the 
high impedance input node. 

THERMAL MONITOR/FLAG (TMP) AND THERMAL 

MANAGEMENT 

The TMP pin can be used to monitor relative changes in die 
temperature. The typical TMP pin voltage at room temperature 
is approximately 1.9 V and changes at approximately −4.5 mV/°C. 
More precise temperature readings can be achieved through a 
single-point (offset) ambient temperature calibration. This 
calibration can be accomplished by measuring the TMP pin to 
establish the precise voltage corresponding to ambient tempera-
ture. To avoid calibration error due to self heating, power up the 
device in shutdown mode (hold SD low at supply turn on) and 
maintain it in shutdown mode until the TMP pin voltage is 
measured. 
The TMP pin can be connected to the SD pin by installing a 0 Ω 
resistor at R8 to enable the overtemperature and short-circuit 
protection features. Install a resistor at RTEMP to set the thermal 
shutdown threshold temperature. Refer to the 

ADHV4702-1

 

data sheet for more information about the temperature monitor 
and short-circuit protection. 
The ADHV4702-1 evaluation board is designed with an 
exposed copper top layer for robust thermal management. 
Solder the exposed pad (EPAD) of the package to the copper 
layer to ensure optimal thermal dissipation. The top exposed 
copper area is connected to the exposed copper ground plane 
on the bottom by an array of five thermal vias. In addition, a 
heat sink can be attached to the bottom exposed ground plane 
to increase the power dissipation capability of the 

ADHV4702-1

RESISTOR ADJUSTABLE QUIESCENT CURRENT 

(RADJ) 

The EVAL-ADHV4702-1CPZ evaluation board is configured by 
default with a 0 Ω RADJ resistor that fully biases the amplifier 
and sets the supply current to 3 mA. Increasing the value of 
RADJ reduces the quiescent current, lowering the bandwidth 
and slew rate of the amplifier while also reducing quiescent 
power dissipation. Refer to the 

ADHV4702-1

 data sheet for 

more information about RADJ. 

 

Содержание EVAL-ADHV4702-1CPZ

Страница 1: ...er area for attaching a heat sink to provide additional thermal management The evaluation board is a 6 layer board designed to minimize leakage currents with its guard ring feature It accepts Subminia ture Version A SMA and Subminiature Version B SMB edge mounted connectors on the inputs for easy connection to test equipment or other circuitry The ADHV4702 1 data sheet covers the specifications an...

Страница 2: ...ial Power Up 3 Power Supplies and Decoupling 3 Input and Output 3 Digital Ground DGND 3 Shutdown Feature SDN Connector 4 Input Clamping Diodes 4 Input Guard Ring 4 Thermal Monitor Flag TMP and Thermal Management 4 Resistor Adjustable Quiescent Current RADJ 4 Evaluation Board Schematics 5 Ordering Information 7 Bill of Materials 7 High Voltage Evaluation Board 9 Warnings Restrictions and Disclaimer...

Страница 3: ...ircuit can also provide a single supply of 220 V The schematic for the on board power management circuit is shown in Figure 5 For more information refer to the LT8304 1 data sheet for different voltage output options POWER SUPPLIES AND DECOUPLING The EVAL ADHV4702 1CPZ evaluation board can be powered using a single supply or dual supplies The total supply voltage VCC VEE must be between 24 V and 2...

Страница 4: ...e noninverting input by installing a 0 Ω resistor at R10 Remove the input clamping diodes D6 and D7 to ensure the complete enclosure of the high impedance input node THERMAL MONITOR FLAG TMP AND THERMAL MANAGEMENT The TMP pin can be used to monitor relative changes in die temperature The typical TMP pin voltage at room temperature is approximately 1 9 V and changes at approximately 4 5 mV C More p...

Страница 5: ...6 DNI R1210 TBD1210 R0603 0 TBD0603 5015 R1206 R1206 0 R1210 49 9 5015 R2512 142 0701 801 142 0701 801 C7 R26 INN_TP VCC A1 D7 D6 GND VEE D1 SDN VOUT P2 C3 C5 C4 C6 INP1 PWR R11 P3 GND1 RFB R12 R8 R23 R27 C1 R2 INN INN1 TMP RADJ RTEMP R1 R9 C9 RG R4 R7 R6 RCOMP RINN INN_TP1 CFB OUT R24 R25 CLOAD R10 R5 R3 INP_TP RINP INP CCOMP C2 INP_TP1 VEE GRD GRD1 VCC VCC VEE VEE SDN VMID VMID VCC VCC VEE VMID ...

Страница 6: ...0 R16 C20 R29 R30 R28 DS1 P6 VIN_15V P5 P4 P1 C19 C18 R22 R21 D4 D5 C17 C16 R13 T1 R20 R19 R18 R17 R15 R14 D3 D2 C12 C13 C15 C14 C11 U1 C10 C8 VIN_15V VEE_TRANSFORMER GND_TRANSFORMER VCC_TRANSFORMER AGND GND_TRANSFORMER VCC VCC_TRANSFORMER AGND AGND VEE VEE_TRANSFORMER N P A C 4 3 2 1 1 2 1 3 2 1 3 2 1 10 7 9 6 2 4 1 3 5 8 3 8 5 7 6 PAD 2 4 1 AGND AGND AGND PAD TC RREF RFB SW GND VIN INTVCC EN UVL...

Страница 7: ... Connector test point Components Corporation TP 104 01 00 18 2 INN INP Connector SMB Amphenol 142134 19 3 INN1 INP1 VOUT Connector SMA end launch Cinch Connectivity Solutions 142 0701 801 20 6 INN_TP INN_TP1 INP_TP INP_TP1 OUT TMP Connector test points Keystone Electronics 5015 21 3 P1 P4 SDN Connector PCB Berg header straight male 3 position Samtec TSW 103 08 G S 22 3 P2 P3 P5 Connector PCB Berg ...

Страница 8: ...umber 41 1 T1 Transformer Sumida 13324 T196 42 1 U1 LT8304 1 Analog Devices LT8304HS8E 1 PBF 43 1 VCC Connector PCB test point red Components Corporation TP 104 01 02 44 1 VEE Connector PCB test point blue Components Corporation TP104 01 06 45 1 VIN_15V Connector PCB test point white Components Corporation TP 104 01 09 ...

Страница 9: ...any property damage injury or death even if the evaluation board fails to perform as described or expected 4 You must properly dispose of or recycle the electronic components of the evaluation board to avoid injury to any other person Key Instructions It is important to operate this evaluation board within Analog Devices recommended specifications and environmental considerations per the user guid...

Страница 10: ...any other party for any reason Upon discontinuation of use of the Evaluation Board or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evalua...

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