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EVAL-AD7625FMCZ/EVAL-AD7626FMCZ User Guide 

UG-745 

 

Rev. A | Page 17 of 28 

EVALUATION BOARD SCHEMATICS AND ARTWORK 

 

Figure 24. Schematic—System Power Supply Options 

VIN = +5V , VOUT= -2.5V, IOUT = 250 mA

VIN = +12V , VOUT= +5V, IOUT = upto 500 mA

VIN = +12V , VOUT= +7V, IOUT =  upto 300 mA

The ADP124 is available in 2mmx2mm LFCSP packages.

Screw Terminals

OPAMP POWER SUPPLY OPTIONS

5

VIN

4

EN

3

FB

6

SW

2

GND

1

BST

U5

ADP2300AUJZ

+

C38

4.7 µF

R9

16.9K

+

C8

4.7 µF

1

2

L2

IN

D

4.

7 µ

H

R11

35.7K

-2P5V

C69

4.7 µF

C70

4.7 µF

R10

57.6K

R12

12.1K

+7V

R13

0r

R14

0r

+5V

1

VOUT

2

ADJ

3

GND

4

N/C

5

EN/UVLO

6

GND

7

PG

8

VIN

9

EP

U18

ADP7102ACPZ

1

2

D3

1A, 30V

C9

4.7 µF

C10

4.7 µF

R63

0r

1

VOUT

2

SENSE

3

GND

4

N/C

5

EN/UVLO

6

GND

7

PG

8

VIN

9

EP

U10

ADP7104ACPZ-5.0

R62

100K

C58
10 µF

C65

10 µF

1

2

3

JP6

1

AMP_PWR-1

1

2

3

JP1

0

A

B

LK9

A

B

LK10

C68

1uF

C72

1uF

VIO_2PT5V

R52

0r

J4-1

3 Pin Terminal Block (5mm Pitch)

J4-2

J4-3

1

OUT

2

OUT

3

OUTSEN

4 GND

5 EN
6 NC

7 IN

8 IN

9

EP

U16

ADP124ARHZ-2.5

R54

0r

C63

1uF

C64

1uF

2PT5V

R55

0r

1

OUT

2

OUT

3

OUTSEN

4 GND

5 EN
6 NC

7 IN

8 IN

9

EP

U12

ADP124ARHZ-2.5

3PT3V

C66

0.1uF

C71

10 µF

+5V

+12V_FMC

+7V

+5V

+12V_FMC

PG_C2M

PG_C2M

-2.5V

+5V

_EXT

VIO

+5V

+7V

-2.5V

AMP_PWR-

+3.3V

+5V

+2.5V

+3.3V_FMC

12552-

024

Содержание EVAL-AD7625FMCZ

Страница 1: ...ON The EVAL AD7625FMCZ EVAL AD7626FMCZ are evaluation boards designed to demonstrate the low power performance of the AD7625 AD7626 16 bit 6 MSPS 10 MSPS PulSAR differential analog to digital converters ADCs and to provide an easy to understand interface for a variety of system applications Full descriptions of the AD7626 and AD7625 are available in the respective product data sheets which should ...

Страница 2: ...are Operation 10 Waveform Capture 12 DC Testing Histogram 13 AC Testing Histogram 13 AC Testing FFT Capture 14 Summary Tab 15 Troubleshooting 16 Software 16 Hardware 16 Evaluation Board Schematics and Artwork 17 Bill of Materials 26 REVISION HISTORY 8 15 Rev 0 to Rev A Changes to General Description Section 1 Change to Power Supplies Section 4 Change to PLL Enable Section 10 Added Evaluation Board...

Страница 3: ...625FMCZ EVAL AD7626FMCZ EVAL SDP CH1Z VCM 7V 2 5V AD8031 100Ω 100Ω 100Ω LVDS INTERFACE 160 PIN 10mm VITA 57 CONNECTOR 100Ω REF REFIN VDD1 VDD2 VIO CNV CLK D DCO ADR4540 7V 7V 4 096V 4 096V AD8031 5V 12V 12V 12V WALL WART USB PORT 2 5V ADA4899 1 ADA4899 1 VCM ADP124 ADP7102 ADR3412 ADP2300 ADP7104 POWER SUPPLY CIRCUITRY ADSP BF527 SPARTAN 6 FPGA XC6SLX25 12552 002 ...

Страница 4: ...7 comes from the EVAL SDP CH1Z through a 160 pin FMC connector J7 Each supply is decoupled where it enters the board and again at each device A single ground plane is used on this board to minimize the effect of high frequency noise interference Table 1 Pin Jumper Descriptions Link Default Description JP1 JP2 B to center Connects CNV and CNV from the FPGA The A to center position connects the CNV ...

Страница 5: ...25P32 SDRAM memory Micron MT48LC16M16A2P 6A 16 Mb 16 bits 256 Mb 32 MB 2 120 pin small footprint connectors Hirose FX8 120P SV1 91 120 pin header Blackfin processor peripherals exposed SPI SPORT TWI I2 C GPIO PPI Asynchronous parallel ANALOG INPUTS The analog inputs applied to the EVAL AD7625FMCZ EVAL AD7626FMCZ are the J3 and J5 SMA push on connectors These inputs are buffered with dedicated disc...

Страница 6: ... Ω single ended trace and a 100 Ω differential trace Separate analog and digital sections and keep power supply circuitry away from the AD7625 AD7626 Avoid running digital lines under the device as well as crossover of digital and analog signals because these couple noise into the AD7625 AD7626 Do not run fast switching signals such as CNV or clocks near analog signal paths Remove the ground and p...

Страница 7: ... PC There are two parts of the software installation process AD7625 AD7626 evaluation software installation EVAL SDP CH1Z board drivers installation Figure 3 to Figure 9 show the steps to install the AD7625 AD7626 evaluation software and Figure 10 to Figure 14 show the steps to install the EVAL SDP CH1Z drivers Proceed through all of the installation steps to install the software and drivers in th...

Страница 8: ...ure 9 Evaluation Software Installation Complete Figure 10 EVAL SDP CH1Z Drivers Setup Welcome Figure 11 EVAL SDP CH1Z Drivers Setup Choose Install Location Figure 12 EVAL SDP CH1Z Drivers Setup Installing Drivers Figure 13 EVAL SDP CH1Z Drivers Setup Windows Security 12552 008 12552 009 12552 010 12552 011 12552 012 12552 013 ...

Страница 9: ...VAL SDP CH1Z board appears under ADI Development Tools which indicates that the installation is complete Figure 16 Device Manager LAUNCHING THE SOFTWARE When the evaluation board and the SDP board are correctly connected to the PC the AD7625 AD7626 evaluation software can be launched 1 From the Start menu click Programs Analog Devices AD7626_25 Evaluation Software The main window of the software t...

Страница 10: ...quency must be at least 500 kSPS If the user enters a value exceeding the ability of the ADC the AD7625 AD7626 have a maximum sample frequency of 10M 6M the software indicates this and the user must revert to the maximum sample frequency Samples From the Samples drop down menu Label 5 in Figure 19 select the number of samples to analyze when running the software this number is limited to 1 048 576...

Страница 11: ...EVAL AD7625FMCZ EVAL AD7626FMCZ User Guide UG 745 Rev A Page 11 of 28 Figure 19 Evaluation Software Window 1 2 3 5 8 9 6 7 4 10 12552 019 ...

Страница 12: ...kHz sine wave input signal was used along with an on board 4 096 V external reference The Waveform Analysis boxes Label 1 in Figure 20 show the amplitudes recorded from the captured signal in addition to the frequency of the signal tone Figure 20 Waveform Capture Tab 1 CONTROL CURSOR CONTROL PANNING CONTROL ZOOMING 12552 020 ...

Страница 13: ...urce to the J3 and J5 inputs The signal may need to be filtered so that the dc source noise is compatible with that of the ADC AC TESTING HISTOGRAM The histogram can also be used to test the ADC for the code distribution for ac input compute the mean and standard deviation or transition noise of the converter and display the results Raw data is captured and passed to the PC for statistical computa...

Страница 14: ...equired to allow true evaluation of the device One possibility is to filter the input signal from the ac source There is no suggested band pass filter but carefully consider the choices Furthermore if using a low frequency band pass filter when the full scale input range is more than a few volts peak to peak it is recommended to use the on board amplifiers to amplify the signal thus preventing the...

Страница 15: ... A Page 15 of 28 SUMMARY TAB Figure 23 shows the Summary tab which captures all the display information and provides it in one tab with a synopsis of the information including key performance parameters such as SNR and THD Figure 23 Summary Tab 12552 023 ...

Страница 16: ... case it is advised not to read continuously or alternatively to lower the number of samples taken Note that when reading continuously from the ADC the recommended number of samples is up to 1 048 576 HARDWARE If the software does not read any data back take the following steps With the 12 V wall wart plugged in to the SDP board check that the voltage applied is within the ranges shown in Table 3 ...

Страница 17: ...R13 0r R14 0r 5V 1 VOUT 2 ADJ 3 GND 4 N C 5 EN UVLO 6 GND 7 PG 8 VIN 9 EP U18 ADP7102ACPZ 1 2 D3 1A 30V C9 4 7 µF C10 4 7 µF R63 0r 1 VOUT 2 SENSE 3 GND 4 N C 5 EN UVLO 6 GND 7 PG 8 VIN 9 EP U10 ADP7104ACPZ 5 0 R62 100K C58 10 µF C65 10 µF 1 2 3 JP6 AMP_PWR 1 AMP_PWR 1 1 2 3 JP10 A B LK9 A B LK10 C68 1uF C72 1uF VIO_2PT5V R52 0r J4 1 3 Pin Terminal Block 5mm Pitch J4 2 J4 3 1 OUT 2 OUT 3 OUTSEN 4 ...

Страница 18: ...2 3 6 OP 4 V 7 V U8 AD8031ARZ C43 2 2µF C44 DNP R38 0r R39 DNP C45 DNP R40 0r C46 DNP R41 DNP C47 0 1uF 2 3 6 OP 4 V 7 V U11 AD8031ARZ C48 10 µF R42 1M C49 0 1uF C51 0 1uF C52 10 µF R44 0r VCM C53 10 µF C54 0 1uF REF R45 0r 4PT096V_REF R46 0r R47 0r VCM_BUF C55 0 1uF C60 10 µF R48 0r C61 0 1uF C62 10 µF 1PT2V_REFIN A B LK6 Default is B to centre linked GND2 R50 DNP 2 VIN 6 VOUT 4 GND U14 ADR4540BR...

Страница 19: ...9 1 1 2 3 JP11 1 2 3 JP12 1 2 3 JP13 1 2 3 JP14 C39 0 1uF R70 20r R71 20r C56 DNP C57 56pF C76 56pF R72 DNP R73 DNP C77 DNP R74 DNP C78 DNP R75 82r R76 82r R77 0r R78 0r R79 1k R80 1k R81 DNP R82 DNP C79 0 1uF C80 DNP C81 0 1uF C82 DNP C83 0 1uF C84 0 1uF C85 0 1uF C86 0 1uF R83 0r R84 0r R85 0r R86 0r R87 0r R88 0r C88 100pF GND3 J3 J5 J6 J8 J9 1 6 Pin 2x3 0 1 Pitch TH R A SOCKET J9 2 J9 3 J9 4 J...

Страница 20: ...100nF C15 10nF C16 10uF C17 10uF C18 10uF 1 VDD1 2 VDD2 3 CAP1 4 REFIN 5 EN0 6 EN1 7 VDD2 8 CNV 9 CNV 10 D 11 D 12 VIO 13 GND 14 DCO 15 DCO 16 CLK 17 CLK 18 VDD2 19 VDD1 20 VDD1 21 VCM 22 IN 23 IN 24 GND 25 CAP2 26 CAP2 27 GND 28 CAP2 29 REF 30 REF 31 GND 32 REF 33 PADDLE AD7626BCPZ 1 2 3 JP1 1 2 3 JP2 1 2 J2 R21 DNP 1 2 J10 R22 DNP DCO DCO D D EN1 EN0 CLK CLK 5V 2 5V VIO VCM_OUT FPGA_CNV FPGA_CNV...

Страница 21: ...UT1B 23 OUT1 24 VS6 25 S0 26 VS7 27 OUT0B 28 OUT0 29 VS8 30 VS9 31 GND 32 RSET 33 PADDLE U19 AD9513BCPZ C11 10uF C12 10uF C13 10uF C14 10uF L3 470r 100MHz 1 VC 6 VS 3 GND 4 RF_OUT 5 COMP Y3 100 0MHz C20 10pF R16 0r C22 22uF R17 DNP R18 10K 1 TRI 6 VS 3 GND 4 RF_OUT 5 RF OUT Y2 VFXO321 BBEC 100MHZ 100MHz 1 E D 2 GND 3 RF_OUT 4 VCC Y4 XTAL CWX113 100MHZ 100MHz C24 1nF REFIN1 R20 91r R3 100R R4 10R R...

Страница 22: ...16_P LA16_N LA20_P LA20_N LA22_P LA22_N LA25_P LA25_N LA29_P LA29_N LA31_P LA31_N LA33_P LA33_N GND GND GND GND GND GND GND GND GND GND GND GND GND VADJ VREF_A_M2C PRSNT_M2C_L CLK0_M2C_P CLK0_M2C_N LA02_P LA02_N LA04_P LA04_N LA07_P LA07_N LA11_P LA11_N LA15_P LA15_N LA19_P LA19_N LA21_P LA21_N LA24_P LA24_N LA28_P LA28_N LA30_P LA30_N LA32_P LA32_N 24LC02 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C1...

Страница 23: ...EVAL AD7625FMCZ EVAL AD7626FMCZ User Guide UG 745 Rev A Page 23 of 28 Figure 31 Evaluation Board Silkscreen Bottom Assembly Figure 32 Evaluation Board Top Layer 12552 031 12552 032 ...

Страница 24: ...UG 745 EVAL AD7625FMCZ EVAL AD7626FMCZ User Guide Rev A Page 24 of 28 Figure 33 Evaluation Board Layer 2 Ground Figure 34 Evaluation Board Layer 3 Power 12552 033 12552 034 ...

Страница 25: ...EVAL AD7625FMCZ EVAL AD7626FMCZ User Guide UG 745 Rev A Page 25 of 28 Figure 35 Evaluation Board Bottom Layer 12552 035 ...

Страница 26: ...5 C71 Capacitor GRM219R61C106KA73D FEC 1845747 C56 Capacitor 0603 N A Do not place C57 C76 Capacitor 0603 06035A560JAT2A FEC 2280650 C63 C64 C68 C72 Capacitor LMK107B7105KA T FEC 2112849 C77 C78 C80 C82 Capacitor 0603 N A Do not place C88 C89 Capacitor 0603 C1608C0G1H101J080AA FEC 1907297 D3 Diode Schottky 30 V 1 A PD3S130L PD3S130L Digi Key PD3S130LDICT ND GND1 GND2 GND3 GND4 GND5 Test point 20 3...

Страница 27: ...0 R72 R73 R74 R81 R82 Resistor 0 Ω N A Do not place R75 R76 82 Ω 0603 1 0 063 W MC0063W0603182R FEC 9331590 R79 R80 Resistor 0 Ω MC 0 063W 0603 1 1K FEC 9330380 R83 R84 R85 R86 R87 R88 Resistor MC 0 063W 0603 0R FEC 9331662 T2 Transformer MABA 007159 000000 MACOM MABA 007159 000000 U1 AD7626BCPZ AD7626BCPZ AD7626BCPZ U2 U3 NC7S04 NC7SZ04M5 FEC 1013809 U4 ADR3412ARJZ ADR3412ARJZ ADR3412ARJZ R2 U5 A...

Страница 28: ... transfer any portion of the Evaluation Board to any other party for any reason Upon discontinuation of use of the Evaluation Board or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damages or any mo...

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