UG-478
Evaluation Board User Guide
Rev. 0 | Page 6 of 40
POWER SUPPLIES
The evaluation board requires that an external power supply—
either a bench top supply or a wall wart (dc plug) supply—be
applied to J4 or J5 (see Table 3 for more information). Linear
regulators generate the required power supply levels from the
applied V
IN
rail. The regulators used are the 5 V
ADP1720
(U7)
and the 2.5 V
ADP1720
(U4), which supply 5 V and 2.5 V,
respectively, to AVDD1/AVDD2 of the ADC. The 3.3 V
ADP1720
(U10) delivers 3.3 V to the IOVDD pin of the
AD7176-2
.
When a split power supply is used, the AVSS voltage must be
applied from an external source via Connector J9. AVDD1/
AVDD2 and IOVDD can also be provided via Connector J9.
However, the 7 V to 9 V supply is still required because the
on-board reference (
ADR445
) is supplied from this power supply.
Each supply is decoupled at the point where it enters the board
and again at the point where it connects to each device (see
the schematics shown in Figure 25 to Figure 28 to identify
decoupling points).
SERIAL INTERFACE
The
AD7176-2
evaluation board connects via the SPI to the
Blackfin®
ADSP-BF527
on the
EVAL-SDP-CB1Z
. There are four
primary signals: CS, SCLK, DIN, and DOUT/RDY (all are
inputs, except for DOUT/RDY, which is an output.)
If you wish to operate the
EVAL-AD7176-2SDZ
in standalone
mode, the
AD7176-2
serial interface lines can be disconnected
from the 120-pin header by removing the 0 Ω links, R9 through
R13. The test points can then be used to fly-wire the signals to
an alternative digital capture setup.
ANALOG INPUTS
The
EVAL-AD7176-2SDZ
primary analog inputs can be applied
in two ways:
•
Using J8, the green screw in terminal connector on the
right hand side of the board.
•
Using the A0 to A4 SMB/SMA footprints on the evaluation
board.
The AIN0 to AIN3 analog inputs are routed via the
AD8656
buffers to the associated input pins on the
AD7176-2
, and the
AIN4 analog input is connected to Connector J8 if LK5 to LK9
are removed, disabling the on-board noise test. The buffers are
configured for a gain of 2.
The
EVAL-AD7176-2SDZ
software is set up to analyze dc
inputs to the ADC.
Table 3. Required External Power Supply
1
Power Supply
(V
IN
) Applied To Voltage Range
Function
J4
7 V to 9 V
Bench top supply to the evaluation board. Supplies LDOs that create 5 V, 2.5 V, and 3.3 V rails. It also
supplies the
ADR445
external reference. Ensure that LK2 is set to Position A when the external power
supply is applied to this connector.
J5
7 V to 9 V
Wall wart (dc plug) supply to the evaluation board. Supplies LDOs that create 5 V, 2.5 V, and 3.3 V rails.
It also supplies the
ADR445
external reference. Ensure that LK2 is set to Position B when the external
power supply is applied to this connector.
1
Only a single supply is required, either J4 or J5. This can be selected using LK2.
Содержание EVAL-AD7176-2SZD
Страница 22: ...UG 478 Evaluation Board User Guide Rev 0 Page 22 of 40 Figure 26 Schematic Amplifiers 11035 033 ...
Страница 23: ...Evaluation Board User Guide UG 478 Rev 0 Page 23 of 40 Figure 27 Schematic Power Supply Sequencing 11035 023 ...
Страница 24: ...UG 478 Evaluation Board User Guide Rev 0 Page 24 of 40 Figure 28 Schematic Regulators 11035 024 ...
Страница 25: ...Evaluation Board User Guide UG 478 Rev 0 Page 25 of 40 Figure 29 Schematic SDP Connector 11035 025 ...
Страница 29: ...Evaluation Board User Guide UG 478 Rev 0 Page 29 of 40 Figure 36 Layer 4 Component Side 11035 032 ...