Analog Devices EV1HMC8362LP6G Скачать руководство пользователя страница 7

EV1HMC8362LP6G

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EV1HMC8364LP6G

 User Guide 

UG-1787 

 

Rev. 0 | Page 7 of 11 

EVALUATION AND TEST 

To configure the EV1HMC8362LP6G and EV1HMC8364LP6G 
for the first time, follow Step 1 through Step 6 outlined in the 
Evaluation Board Setup Procedure section.  
The frequency vs. tuning voltage listed in the following steps are 
specific to the EV1HMC8362LP6G, but the same process is 
applicable to the EV1HMC8364LP6G. The frequency range and 
performance are different.  
1.

 

Enable the variable power supply, and adjust the tuning 
voltage to 8.45 V.  

2.

 

If the EV1HMC8362LP6G is configured correctly, a signal 
at approximately 13.5 GHz with approximately 0 dBm to 
2 dBm of output power appears on a spectrum analyzer or 
signal source analyzer. Refer to Figure 4.  

3.

 

Remove the bias for the buffer amplifier (VCB), which 
results in the output power decreasing by approximately 
28 dBm. Refer to Figure 5. 

4.

 

Finally, use the signal source analyzer to measure the phase 
noise. Refer to Figure 6. 

1

MKR1  13.499 70GHz
–0.49dBm

#RES BW 100kHz
#VBW 50MHz

CENTER 13.50000GHz

SPAN 50.00MHz

SWEEP 4.600ms (1001pts)

23626-

006

1

REF 10dBm

 

Figure 4. EV1HMC8362LP6G, VCO Band 1, V

TUNE

 = 8.45 V, 13.5 GHz, Includes 

Insertion Loss of RF Cable 

1

MKR1  13.499 15GHz
–28.050dBm

REF 10dBm

#RES BW 100kHz
#VBW 50MHz

CENTER 13.50000GHz

SPAN 50.00MHz

SWEEP 4.600ms (1001pts)

23626-

007

1

 

Figure 5. EV1HMC8362LP6G, VCO Band 1, VTUNE = 8.45 V, 13.5 GHz, Buffer 

Amplifier Disabled (J3 Output Muted), Includes Insertion Loss of RF Cable 

–40

–50

–60

–70

–80

–90

–100

–110

–120

–130

–140

–150

–160

–170

–180

1k

10k

100k

FREQUENCY (Hz)

1M

10M

PH

A

SE N

O

ISE (d

B

c

/H

z)

1kHz
–46.0811dBc/Hz

10kHz
–73.4403dBc/Hz

100kHz
–101.0399dBc/Hz

1MHz
–129.0291dBc/Hz

10MHz

–154.9427dBc/Hz

40MHz

–161.4121dBc/Hz

23626-

008

 

Figure 6. EV1HMC8362LP6G Phase Noise at J3, VCO Band 1, V

TUNE

 = 8.45 V, 

13.5 GHz 

 
 

 
 
 

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Содержание EV1HMC8362LP6G

Страница 1: ...evaluation board EQUIPMENT NEEDED Power supply 6 V Power supply low noise variable 0 V to 13 5 V 50 terminations Signal source analyzer ONLINE RESOURCES HMC8362 data sheet HMC8364 data sheet Linduino...

Страница 2: ...valuation Board Setup Procedure 3 Evaluation Board Hardware 4 Power Supplies 4 Voltage Controlled Oscillator VCO 4 Buffer Amplifier 4 RF Output 4 Loop Filter 5 Default Configuration 5 Evaluation Board...

Страница 3: ...Figure 2 is annotated in green to indicate where a jumper is connected and thus shorted to ground ALT_EN VCB_EN NC VC_A0 VC_A1 VC_EN GND NC 23626 002 Figure 2 Connector P3 Jumper Configuration Altern...

Страница 4: ...HMC8364LP6G boards accomplish this VCO core selection through the use of the ADG1604 4 1 multiplexer The VCO cores can be enabled and disabled in any sequence desired The EV1HMC8362LP6G and EV1HMC8364...

Страница 5: ...ible while placing the last pole as close to the tuning port pin VTUNE of the VCO The placement of any additional poles that may exist between the first and last pole of the loop filter are not as cri...

Страница 6: ...hich may be beneficial for users needing to develop and test switching algorithms for their application To connect the SDP K1 interface board to the EV1HMC8362LP6G or EV1HMC8364LP6G flip the SDP K1 bo...

Страница 7: ...Finally use the signal source analyzer to measure the phase noise Refer to Figure 6 1 MKR1 13 499 70GHz 0 49dBm RES BW 100kHz VBW 50MHz CENTER 13 50000GHz SPAN 50 00MHz SWEEP 4 600ms 1001pts 23626 006...

Страница 8: ...6 C24 C23 L19 L18 L21 C27 C18 C15 C17 R5 C11 R7 J2 R37 E2 R20 R2 R35 R25 R24 R15 E13 R18 R16 J5 R27 U4 R11 R9 R10 R12 R13 J3 J4 D1 R4 C2 J1 TP1 TP2 R3 R6 E4 E12 R26 C1 C32 E14 R34 P3 P3 C12 R23 U5 C4...

Страница 9: ...d EV1HMC8364LP6G Metal 2 Ground 23626 012 Figure 10 EV1HMC8362LP6G and EV1HMC8364LP6G Metal 3 RF and DC 23626 013 Figure 11 EV1HMC8362LP6G and EV1HMC8364LP6G Metal 4 Backside Downloaded from Arrow com...

Страница 10: ...nductor chip ferrite bead 0 7 0 3 A 220 at 100 MHz Murata BLM15GG221SN1D J1 J2 J5 SMA 50 end launch jack Not applicable Cinch 142 0701 851 J3 2 92 mm coaxial for frequency test measurements 50 40 GHz...

Страница 11: ...Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damages or any modif...

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