UG-1787
EV1HMC8362LP6G
/
EV1HMC8364LP6G
User Guide
Rev. 0 | Page 4 of 11
EVALUATION BOARD HARDWARE
The EV1HMC8362LP6G and EV1HMC8364LP6G are identical
except for Resistor R6, which sets the current limit function of
the
LT3042
, and C31, which is the ac coupling capacitor on the
RF output port.
The evaluation board schematics, assembly, silkscreen, and bill
of materials are available in the Evaluation Board Schematic and
Artwork section and Ordering Information section. The Gerber
fabrication files are available at
www.analog.com/HMC8362
and
www.analog.com/HMC8364
.
POWER SUPPLIES
The EV1HMC8362LP6G and EV1HMC8364LP6G boards are
powered by a 6 V dc (150 mA) power supply connected to the
J1 SMA connector labeled 6.0 V. This supply path includes a
single ultralow noise, low dropout linear regulator, the
LT3042
.
As an extra safeguard, the
LT3042
is configured to use the
current-limit feature. A resistor (R6) sets the current limit on
ILIM (Pin 5) of the
LT3042
to 114 mA (R6 = 1100 Ω) for the
EV1HMC8362LP6G and 156 mA (R6 = 806 Ω) for the
EV1HMC8364LP6G.
Users that intend to use an external power supply such as the
Linduino® or Arduino® Uno microcontroller to directly
program the logic from the P3 header must remove the five
10 kΩ resistors (R9, R10, R11, R12, and R13) or damage may
occur.
A second low noise power supply cable providing up to 13.5 V
is required to tune the VCOs. Use of a noisy power supply on
the tuning port results in narrow-band FM modulation and
sidebands.
VOLTAGE
CO
NTROLLED OSCILLATOR
(VCO)
The
HMC8362
and
HMC8364
include a total of four VCO cores
that generate a range of fundamental frequencies. The
frequency range of each core overlaps the adjacent core to allow
continuous frequency coverage including any supply and
temperature variation.
By generating fundamental frequencies, the need for additional
filtering can be reduced or eliminated because there are no
subharmonics. The tuning sensitivity across the band is similar
for each core, which simplifies the loop filter design. Any
frequency planning or dynamic loop bandwidth adjustment
required to manage spurs or settling time is made easier by the
consistent tuning sensitivity from core to core. The integrated
common tuning (VTUNE on J2) and RF output (J3) ports
simplify layout. Each band has an allowable tune voltage of
1.0 V dc to 13.5 V dc.
The oscillator cores must be selected, one at a time, depending
on the frequency range required at any point in time by the
application. The VCO cores are selected by simply enabling the
supply voltage at its respective bias pin (VC1 through VC4).
The EV1HMC8362LP6G and EV1HMC8364LP6G boards
accomplish this VCO core selection through the use of the
ADG1604
4:1 multiplexer. The VCO cores can be enabled and
disabled in any sequence desired.
The EV1HMC8362LP6G and EV1HMC8364LP6G boards
include additional filtering to prevent supply voltage overshoot
and undershoot, which can damage the device if overshoot
exceeds 5.5 V. This filtering provides 5 V of biasing that settles
within about 1 µs.
BUFFER AMPLIFIER
The buffer amplifier used in the
HMC8362
and
HMC8364
is a
broadband cascode design that draws approximately 12 mA and
is shared by all four VCO cores. Pin 8 (VCB) of the
HMC8362
and
HMC8364
provides the bias voltage for the upper half of
the cascode amplifier. The VCO outputs provide the biasing for
the lower half of the cascode amplifier stage. When one of the
four VCOs is enabled, the cascode amplifier becomes fully
enabled and provides an output signal at Pin 5 (RFOUT). The
buffer amplifier was designed to handle the power supplied by
only one VCO at a time. To prevent long-term damage that can
occur if more than one VCO is powered up simultaneously, the
EV1HMC8362LP6G and EV1HMC8364LP6G boards
incorporate the
ADG1604
4:1 multiplexer. As configured on the
EV1HMC8362LP6G and EV1HMC8364LP6G, the
ADG1604
multiplexer incorporates exclusive OR (XOR) logic and the
ability to break contact with one VCO for a minimum of 30 ns
before closing the contacts on the next switch to power up a
different VCO core. To minimize the switching time of the
ADG1604
, 5 V logic is used but 3 V can also be used through
an external power supply or microcontroller such as a Linduino
or Arduino Uno.
Refer to the
ADG1604
data sheet for more information
regarding the
ADG1604
logic and use with other logic levels.
Users can opt to leave the VCO enabled and power down Pin 8
(VCB) to mute the output signal, which leaves the lower stage of
the cascode enabled. However, because the upper circuitry is
disabled, RF is not routed to the output.
Figure 5 shows the EV1HMC8362LP6G with VCO Band 1, but
with
the output buffer muted (VCB_EN on P3 = 0).
For additional details on the buffer amplifier circuitry, consult
the
HMC8362
or
HMC8364
data sheet.
RF OUTPUT
The EV1HMC8362LP6G and EV1HMC8364LP6G boards have a
single RF output port (J3). J3 is supplied by a buffer amplifier that is
common to all four VCO cores.
J3 is a single-ended RF output that operates up to 26.6 GHz.
The actual frequency range and power level at any given time
depends on which quadband VCO variant is being evaluated
and the VCO core that is enabled. Consult the
HMC8362
and
HMC8364
data sheets for additional information relative to the
specific variant being evaluated for more information.
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