System Architecture
2-2
ADSP-BF592 EZ-KIT Lite Evaluation System Manual
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board (
Figure 2-1
).
The EZ-KIT Lite is designed to demonstrate the ADSP-BF592 Blackfin
processor capabilities. The processor has an I/O voltage of 3.3V. The core
voltage of the processor is controlled by an Analog Devices ADP1715 low
dropout regulator (LDO) and an Analog Devices AD5258 digipot, which
is configurable over the 2-wire interface (TWI) signals. Refer to the
Figure 2-1. EZ-KIT Lite Block Diagram
ADSP-BF592
DSP
400 MHz
64 lead LFCSP
LEDs (3)
JTAG
Po
rt
SPI
25 MHz
Oscillator
UARTs
PBs (3)
RS-232
Female
RS-232
TX/RX
SPORT
TWI
PPI
CLKIN
GP
IO
On-board
Debug Agent
Lo
w
Spe
ed
Group 2A
Low S
p
eed
Group 1
A
Low S
p
eed G
roup
1B
SPORT
16 Mb
SPI Flash
12 MHz
Oscillator
SSM2603
Codec
Mic/
Line
In
Head/
Line
Out
Power
Regulation
Li Battery
Charge Circuit,
Fuel Gauge
3
PW
M
Содержание ADSP-BF592 EZ-KIT Lite
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