Power Architecture
1-30
ADSP-BF526 EZ-Board Evaluation System Manual
power to the EZ-Board, the expansion interface II 5V current is reduced
to 400mA. If more current is required, then a separate power connector
and a regulator must be designed on a daughter card. Additional circuitry
can add extra loading to signals, decreasing their maximum effective
speed.
Analog Devices does not support and is not responsible for the
effects of additional circuitry.
Power Architecture
The ADSP-BF526 EZ-Board has three primary voltage sources, a lithium
ion battery (740 mAh), a 5V wall adaptor, and
VBUS
supplied over a USB
cable. There is an OR’ing opamp circuit, which allows the board to draw
power from any supply source that has the highest voltage potential. For
example, if the battery is turned on while the board is plugged into the 5V
wall adaptor (
P14
), the board runs from the 5V wall adaptor.
The VDDEXT, VDDMEM, and SDRAM power are 1.8V and supplied
by an ADP2105 regulator (
VR3
).
The ADSP-BF526 core voltage, VDDINT, is selected via the I
2
C inter-
face of the processor. The default is 1.4V. An I
2
C voltage translator (
U39
)
interfaces the 1.8V signals
SDA
and
SCL
of the processor to the AD5258
digital potentiometer (digipot,
U34
). The digipot sets the feedback resis-
tors for a low drop-out (LDO) regulator ADP1715 (
VR5
). See the POST
example located in the ADSP-BF526 directory of CCES or Vi+
to learn how to change the VDDINT voltage.
shows the appro-
priate step settings for the digipot and corresponding voltage values.
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