NAND Flash Interface
1-18
ADSP-BF526 EZ-Board Evaluation System Manual
By default, the EZ-Board boots from the 16-bit parallel flash memory.
The processor boots from flash memory if the boot mode select switch
(
SW1
) is set to a position of 1 (see
“Boot Mode Select Switch (SW1)” on
).
Flash memory code can be modified. For instructions, refer to the online
help and example program included in the EZ-Board installation
directory.
NAND Flash Interface
The ADSP-BF526 processor is equipped with an internal NAND flash
controller, which allows the 2 Gb 1.8V ST Micro’s NAND02 device to be
attached gluelessly to the processor. NAND flash is attached via the pro-
cessor’s specific NAND flash control and data lines. NAND flash shares
pins with the Ethernet PHY, host connector, and expansion interface II.
The NAND chip enable signal (
NDCE#_HOSTD10
) can be disconnected from
NAND flash by turning
SW13.4
(switch 13 position 4)
OFF
. This ensures
that NAND flash is not driving data when
HOSTD10
changes state. See
“Rotary/NAND Enable Switch (SW13)” on page 2-14
information.
The Ethernet PHY (
U29
) must be disabled in order for NAND flash to
function properly. This is accomplished by setting switch
SW12
to
OFF
,
OFF
,
ON
,
OFF
.
For more information about the NAND02 device, refer to the Numonyx
Web site:
An example program is included in the EZ-Board installation directory to
demonstrate how to setup and access the NAND flash interface.
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