ADSP-2192 Peripheral Device Control Registers
B-22 ADSP-219x/2192 DSP Hardware Reference
9
AIEN
DSP Interrupt Enable: AC’97 Interrupt.
When 1, enables an IO interrupt to this DSP from the AC’97
port. If 0, no interrupt will be signalled and the correspond-
ing Interrupt Pending bit will not be set upon an event.
(Read/Write).
10
GIEN
DSP Interrupt Enable: GPIO Interrupt.
When 1, enables an IO interrupt to this DSP from the GPIO.
If 0, no interrupt will be signalled and the corresponding
Interrupt Pending bit will not be set upon an event.
(Read/Write).
11
Reserved
12
PMINT
Power Management Interrupt Pending.
When 1, indicates an interrupt is pending for the respective
DSP from a Power Management State Change event. A write
of 1 clears this interrupt flag. A write of 0 has no effect.
13
AINT
When 1, an IO interrupt (
IMASK
bit
6
) to this DSP is pend-
ing from the AC’97 port. A write of 1 clears this interrupt
flag. A write of 0 has no effect. The AC’97 port should be
cleared prior to clearing this interrupt flag, or it may be
re-triggered. Similarly, this interrupt flag must be cleared
prior to executing an RTI from the DSP interrupt handler
routine, or the DSP may immediately take another interrupt.
14
GINT
When 1, an IO interrupt (
IMASK
bit
6
) to this DSP is pend-
ing from the GPIO. A write of 1 clears this interrupt flag. A
write of 0 has no effect. The GPIO should be cleared first
(e.g., clearing a GPIO Status Bit) prior to clearing this inter-
rupt flag, or it may be re-triggered. Similarly, this interrupt
flag must be cleared prior to executing an RTI from the DSP
interrupt handler routine, or the DSP may immediately take
another interrupt.
15
Reserved
Table B-6. DSP Interrupt/Powerdown (PWRPx) Register Bit Descriptions
(Continued)
Bit Position
Bit Name
Description
