UG-1098
ADE9000 Technical Reference Manual
Rev. 0 | Page 26 of 86
Zero-Crossing Output Rates
There are seven zero-crossing detection circuits that monitor
IA, IB, IC, VA, VB, VC, and the combined (VA + VB − VC)/2
signal. The zero-crossing detection circuits have two different
output rates: 8 ksps and 1024 ksps. The 8 ksps zero-crossing
signal is used to calculate the line period, sent to the ZXx bits in
the STATUS1 register, and is monitored by the zero-crossing
timeout, phase sequence error detection, resampling and energy
accumulation functions. The 1024 ksps signal is used for angle
measurements and is output on the CF3/ZX pin if the
CF3_CFG bit in the CONFIG1 register is equal to 1.
Table 17 indicates which zero-crossing edges (negative to
positive and positive to negative) are used for each function and
indicates what happens if a zero-crossing is blocked because the
input signal is below the user configured ZXTHRSH.
The CF3/ZX output pin goes from low to high when a negative
to positive transition is detected and from high to low when a
positive to negative transition occurs. The ZX_SEL[1:0] bits in
the ZX_LP_SEL register select the zero-crossing output used for
line cycle energy accumulation and the ZX output pin.
xx_PCF
LPF1
ZX_SRC_SEL
ZX DETECTION
ANGLE MEASUREMENT
ZX OUTPUT ON CF3/ZX PIN
f
DSP
CLKIN/24UPDATE
÷32
ZX INDICATION IN STATUS1
ZERO-CROSSING TIMEOUT
PHASE SEQUENCE ERROR DETECTION
RESAMPLING, ENERGY ACCUMULATION
LINE PERIOD
15523-
029
Figure 29. Zero-Crossing Output Rates
Table 17. Zero-Crossing Use in Other Functions
Functions Using
Zero-Crossing
ZX Transitions
Used
Corresponding
STATUS1
Register Bits
Selecting which Phase
to Use for Measurement
Effect if ZX Does Not Occur
ZX Indication in
STATUS1 Register
Negative to
positive, and
positive to negative
ZXIA, ZXIB, ZXIC,
ZXVA, ZXVB,
ZXVC, ZXCOMB
Not applicable
ZXx bit is latched in STATUS1. If cleared, it is
not set again. ZXx interrupt does not occur.
Zero-Crossing Timeout
Negative to
positive, and
positive to negative
ZXTOVA,
ZXTOVB,
ZXTOVC
Not applicable
Zero-crossing timeout is indicated by the
ZXTOUT bit in the STATUS1 register and an
interrupt can be enabled to occur.
Phase Sequence Error
Detection
Depends on
VCONSEL[2:0]
setting
SEQERR
Not applicable
If one to two ZX events are missing, SEQERR
is generated. If all ZX are missing then
SEQERR bit is note set.
Energy Accumulation
Negative to
positive, and
positive to negative
Not applicable
ZX_LP_SEL.ZX_SEL[1:0]
selects the zero-crossing
output used for line cycle
energy accumulation and
ZX output pin.
Line cycle accumulation does not update.
Line Period Measurement
Negative to
positive
Not applicable
Not applicable
Coerced to default value: 0x00A0_0000 if
ACCMODE.SELFREQ = 0, for a 50 Hz network;
0x0085_5554 if ACCMODE.SELFREQ = 1, for a
60 Hz network.
Resampling, RMS½,
10 Cycle RMS/12 Cycle
RMS
None
Not applicable
ZX_LP_SEL.LP_SEL[1:0]
selects the phase voltage
line period used as the
basis for for these
calculations.
If the selected line period is invalid because
zero-crossings are not detected or the
calculation results in something outside a
40 Hz to 70 Hz range, the line period used for
the calculation is coerced to the default line
period: 0x00A0_0000 if ACCMODE.SELFREQ
= 0, for a 50 Hz network; 0x0085_5554 if
ACCMODE.SELFREQ = 1, for a 60 Hz network.
Angle Measurements
Negative to
positive
Not applicable
Not applicable
Does not update; keeps last value.
ZX Output on CF3/ZX Pin
Negative to
positive, and
positive to negative
Not applicable
ZX_LP_SEL.ZX_SEL[1:0]
selects the zero-crossing
output used for line cycle
energy accumulation and
ZX output pin.
Remains at current state; high or low.
