ADE9000 Technical Reference Manual
UG-1098
Rev. 0 | Page 15 of 86
The variable X is the smallest power level to calibrate. For example,
to calibrate the energy at 10,000 from full scale, X = 10,000 in the
previous equation.
%
05
.
0
000
,
10
20694066
1
=
=
xWATTOS
Then each bit in the xWATTOS register can correct an error of
0.05% at 10,000:1. Note that in most applications, the total
active power performance with small inputs is sufficient with
xWATTOS at zero.
Table 11 shows the settling times for total active power for a
50 Hz signal.
Table 11. Total Active Power Settling Time
Total Active Power Settling Time (sec)
Configuration
FS = 99%
FS = 99.90%
Integrator On, HPF On,
and LPF2 On
0.43
0.66
Integrator Off, HPF On,
and LPF2 On
0.43
0.66
Integrator Off, HPF On,
and LPF2 Off
0.01
0.06
Total Reactive Power
Total reactive power includes reactive power on the fundamental
and on the harmonics. The current channel, xI_PCF, is shifted
by 90° at the fundamental and at all harmonics. This signal is
then multiplied by the voltage waveform, xV_PCF. The result is
then low-pass filtered, unless the DISRPLPF bit in the
CONFIG0 register 1. Finally, the xPGAIN value is applied to
perform a gain correction, and the xVAROS value is applied to
correct the VAR offset. Note that in most applications, the total
reactive power performance with small inputs is sufficient with
xVAROS at zero.
The total reactive power at a power factor of 0 has a similar ripple
to the total active power at a power factor of 1 (see Figure 16).
The resulting AVAR signal has an update rate of 8 ksps and a
bandwidth of 3.2 kHz.
It is possible to disable the reactive power calculation by setting
the VARDIS bit in the VAR_DIS register. This bit must be set
before writing the RUN bit for proper operation.
The total reactive power offset can be calibrated for even better
performance over a wide dynamic range using the xVAROS
register. xVAROS has the same scaling as xVAR; see the Total
Active Power section to understand how to calculate this
register value. Table 12 shows the settling times for total reactive
power for a 50 Hz signal.
Table 12. Total Reactive Power Settling Time
Total Reactive Power Settling Time (sec)
Configuration
FS = 99%
FS = 99.90%
Integrator On, HPF On,
and LPF2 On
0.43
0.59
Integrator Off, HPF On,
and LPF2 On
0.43
0.59
Integrator Off, HPF On,
and LPF2 Off
0.02
0.05
Total Apparent Power
Apparent power is generated by multiplying the current rms
measurement, xIRMS, by the corresponding voltage rms,
xVRMS, and then applying a gain correction, xPGAIN. The
result is stored in the xVA register. Note that the offset of the
total apparent power calculation is performed by calibrating the
xIRMS and xVRMS measurements, using the xIRMSOS and
xVRMSOS registers; see the Filter-Based Total RMS section for
more information on the rms calculation.
The resulting xVA signal has an update rate of 8 ksps and a
bandwidth of 3.2 kHz.
In some applications, if there is a tamper detected on the voltage
channel inputs, it is desirable to accumulate the apparent energy
assuming that the voltage were at a nominal level. The
offers a register, VNOM, which can be set to a value to correspond
to, for example, 240 V rms. If the VNOMx_EN bits in the
CONFIG0 register are set, VNOM is multiplied by xIRMS when
calculating xVA.
Table 13 shows the settling times for total apparent power for a
50 Hz signal.
Table 13. Total Apparent Power Settling Time
Configuration
Total Apparent Power Settling Time,
FS = 99% (sec)
Integrator On, HPF On,
and LPF2 On
0.54
Fundamental Measurements
uses a proprietary algorithm to extract the
fundamental from the total measured signal to make
measurements including fundamental IRMS, VRMS, WATT,
VAR, VA, ITHD, and VTHD. This algorithm requires
initialization of the network frequency and of the nominal
voltage measured in the voltage channel. The SELFREQ bit in
the ACCMODE register selects whether the system is 50 Hz or
60 Hz. For a 50 Hz system, clear the SELFREQ bit; for a 60 Hz
system, set the SELFREQ bit to 1. The SELFREQ selection must
be made prior to writing the RUN register to 1.
The VLEVEL register indicates the nominal value of the voltage
channel. Calculate VLEVEL according to this equation:
VLEVEL
=
X
× 1,114,084
where
X
is the dynamic range that nominal input signal is at
with respect to full scale.
