Analog Devices ADAR1000-EVALZ, Руководство пользователя

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UG-1283 ADAR1000-EVALZ User Guide
Rev. A | Page 4 of 24
USB
SDP
ADAPTER
RF_IO
RX1
NETWORK
ANALYZER
+3.3V –5V GND NOT
USED
1
678
8-
0
03
4
Figure 3. Typical Evaluation Board Setup
DIGITAL INPUT AND OUTPUTS
SDP Connector
The J5 connector interfaces to the SDP adapter that connects
to a Windows-based PC. A detailed description of the SDP
adapter is found in the
SDP-S Controller Board user guide.
All internal registers and control functions of the ADAR1000-
EVALZ are driven from the PC using the ADAR1000-EVALZ
evaluation software.
Daisy-Chain Interface Connectors
The 20-pin connectors (P1 and P2) also carry the digital signals
for controlling the
ADAR1000 . The two connectors have
identical pinouts and the connectors daisy-chain up to four
ADAR1000-EVALZ boards controlled through a single USB
interface. All signals on these connectors except Pin 15 operate
at 3.3 V logic levels, and these signals pass through 3.3 V to 1.8 V
logic translators before connecting to the digital pins on the
ADAR1000 , which operate at 1.8 V logic levels. The serial data
output (SDO) pin from each ADAR1000 , with the 1.8 V logic
levels, can be tied together through the daisy chain (Pin 15 on
P1 and P2) by installing a 0 Ω resistor jumper (R36). The pinout
of P1 and P2 is shown in Table 3.
The TR, TX_LOAD, RX_LOAD, and PA_ON pins on the
ADAR1000 are also controlled by software via general-purpose
input output (GPIO) lines on the SDP connector and 3.3 V to
1.8 V level shifters.
Table 3. Digital Interface—Connectors P1 and P2 Pinout
Pin
1
Signal Name Function
1 AGND Analog ground
2 AGND Analog ground
3 AVDD 3.3 V supply
4 AVDD 3.3 V supply
5 AVDD 3.3 V supply
6 AGND Analog ground
7 AVDD1 −5 V supply
8 No connect Not used
9 GPIO0 RX_LOAD input
10 GPIO1 TX_LOAD input
11 GPIO2 ADDR0 (chip Address 0) input
12 GPIO3 ADDR1 (chip Address 1) input
13 GPIO4 TR input
14 GPIO5 PA_ON input
15 SDO Device serial data output (1.8 V logic)
16 SPI_CLK Serial clock input
17 SPI_MOSI Serial data input
18 SPI_SEL_A Serial enable input, active low
19 SPI_MISO Serial data output
20 AGND Analog ground
1
3.3 V logic, unless noted otherwise.
Device Interface with 1.8 V Logic Levels
Logic signals on the ADAR1000 are brought to an optional
connector, P6, to allow direct interface to the device using 1.8 V
logic signals. To operate in this mode, the logic level translators
(U2, U4, and U5) must be disabled using the J4, J5, J7, and J9
jumpers. The pinout for connector P6 is shown in Table 4.