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AD9959/PCB

Rev. 0 | Page 24 of 28

SCHEMATIC

P2

P1

P0

D1_DVDD

D1_DG

N

D

D1_AVDD

D1_I

O

U

T

D1_I

O

U

T

B

D1_AG

N

D

D0_DVDD

D0_DG

N

D

D0_AVDD

D0_I

O

U

T

D0_I

O

U

T

B

SYNC_I

N

SYNC_O

U

T

RESET

PW

R_DW

N

D2_DVDD

D2_DG

N

D

D2_AVDD

D2_I

O

U

T

D2_I

O

U

T

B

D2_AG

N

D

D3_DVDD

D3_DG

N

D

D3_I

O

U

T

D3_I

O

U

T

B

DGND1

DVDD1

SYNC_CLK

SDIO_3

SDIO_2

SDIO_1

SDIO_0

DVDD_IO

SCLK

CS

IO

_UPDATE

DVDD

GND

P3

D3_AVDD

D3_AGN

D

DAC_RSET

BG_G

ND

BG_VDD

CLK_G

ND

CLK_VDD

REF_

CLKB

REF_

CLK

CMS

PLL/DLL_

GND

PLL/DLL_

VDD

LOOP_F

ILT

D0_AGN

D

1

2

3

4

5

6

7

8

9

10

11

12

13

14

42

41

40

39

38

37

36

35

34

33

32

31

30

29

15

16

17

18

19

20

21

22

23

24

25

26

27

28

56

55

54

53

52

51

50

49

48

47

46

45

44

43

J13

5

4

6

U10

P2

P1

P0

AVDD1

GN

D

AVDD1

GN

D

AVDD0

GN

D

AVDD0

GND

DVDD

SDIO_3

SDIO_2

SDIO_1

SDIO_0

DVDD_IO

SCLK

CSB

IO

_UPDATE

DVDD

GND

P3

RESET

PW

R_DW

N

AVDD2

GN

D

AVDD2

GN

D

AVDD3

GN

D

AVDD3

GND

GND

BG_VDD

GND

CLK_VDD

CLK_MO

DE_SEL

GND

CLK_VDD

GND

SYNC_CLK

GN

D

J12

3

1

2

U10

GN

D

J11

AVDD1

DAC1_O

UT

GN

D

6

5

4

1

2

3

R1

50

Ω

R2

50

Ω

A

D

TT1

-1

AVDD1

AVDD1

AVDD0

DAC0_O

UT

GN

D

6

5

4

1

2

3

R3

50

Ω

R4

50

Ω

A

D

TT1

-1

AVDD0

AVDD0

T2

T3

DAC0/

AD9959

DAC1/

AD9959

AVDD2

DAC2_O

UT

GN

D

3

2

1

4

5

6

R6

50

Ω

R5

50

Ω

A

D

TT1

-1

AVDD1

AVDD1

AVDD3

DAC3_O

UT

GN

D

3

2

1

4

5

6

R8

50

Ω

R7

50

Ω

A

D

TT1

-1

AVDD0

AVDD0

T4

T5

DAC1/

AD9958

DAC3/

AD9959

DAC0/

AD9958

DAC2/

AD9959

GN

D

R11

1.

91k

Ω

ETC1-1-13

1

5

3

4

T1

PRI

SEC

J9

REF

CL

K

GN

D

R10

50

Ω

GN

D

GN

D

R31

25

Ω

R30

25

Ω

C21

0.

1

µ

F

C22

0.

1

µ

F

W1

1

CL

K_MO

DE_SEL

GN

D

CL

K_VDD

GN

D

R9

698

Ω

C38

680p

F

R52

0

Ω

R53

0

Ω

C66

39p

F

C67

39p

F

GN

D

GN

D

NO

T

E

T

H

E D0 AND D1 PI

NS ARE O

N

L

Y

USED F

O

R T

H

E

AD9959,

W

H

ICH HAS DAC0,

DAC1,

DAC2,

AND DAC3.

T

H

E AD9958 USES T

H

E D2 PI

NS F

O

R DAC0 AND

T

H

E D3 PI

NS F

O

R DAC1.

VCC_USB

1

DVDD_I

O

2

GN

D

3

DVDD

4

TB

1

J16

+

C58

10

µ

F

GN

D

AVDD2

J20

+

C68

10

µ

F

GN

D

AVDD3

J10

+

C63

10

µ

F

GN

D

CL

K_VDD

J19

+

C69

10

µ

F

GN

D

AVDD0

J17

+

C36

10

µ

F

GN

D

AVDD3

J18

+

C64

10

µ

F

GN

D

BG

_VDD

+

C37

10

µ

F

DVDD

GN

D

+

C47

10

µ

F

DVDD_I

O

GN

D

+

C35

10

µ

F

VCC_USB

GN

D

C50

0.

1

µ

F

AVDD0

GN

D

C53

0.

1

µ

F

C57

0.

1

µ

F

AVDD1

GN

D

C52

0.

1

µ

F

C54

0.

1

µ

F

DVDD

GN

D

C56

0.

1

µ

F

C51

0.

1

µ

F

AVDD2

GN

D

C46

0.

1

µ

F

C65

0.

1

µ

F

DVDD_I

O

GN

D

C62

0.

1

µ

F

C45

0.

1

µ

F

AVDD3

GN

D

C44

0.

1

µ

F

C55

0.

1

µ

F

BG

_VDD

GN

D

C48

0.

1

µ

F

CL

K_VDD

GN

D

C49

0.

1

µ

F

BYPASS CAPACI

T

O

RS

R21

0

Ω

R54

0

Ω

AVDD0

AVDD1

R55

0

Ω

AVDD0

AVDD3

R51

0

Ω

R62

0

Ω

R63

0

Ω

AVDD0

AVDD1

R64

0

Ω

AVDD2

AVDD1

R50

0

Ω

R56

0

Ω

R57

0

Ω

AVDD2

AVDD3

R58

0

Ω

R59

0

Ω

R60

0

Ω

AVDD2

AVDD3

R61

0

Ω

05698-

051

U3

AD9958/

AD9959

SYNCO

UT

SYNCI

N

SYNC CL

K

74L

V

C125A

74L

V

C125A

x2

25MHz

12

Figure 48. AD9959/PCB Schematic, Page 1

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Содержание AD9959/PCB

Страница 1: ...nderutilized and idle equipment along with credit for buybacks and trade ins Custom engineering so your equipment works exactly as you specify Critical and expedited services Leasing Rentals Demos In...

Страница 2: ...CLK J9 REFCLK MULTIPLIER 4 TO 20 J13 J11 J12 SYNC CLK SYNC IN SYNC OUT 4 SYS CLK TIMING AND CONTROL LOGIC DDS 1 AD9959 EVALUATION BOARD Figure 1 FEATURES Full featured evaluation board for the AD9959...

Страница 3: ...valuation Board Software 5 Installing the Software 5 Configuring the Evaluation Board 5 Windows 98 ME 2000 Users 5 Windows XP Users 6 Loading the Software 7 Status Messages upon Loading Software 8 Fea...

Страница 4: ...VCC_USB 3 3 TB1 2 DVDD_I O 3 3 TB1 3 GND 0 TB1 4 DVDD 1 8 J10 CLK_VDD 1 8 J16 AVDD 1 8 J17 AVDD 1 8 J18 BG_VDD 1 8 J19 AVDD 1 8 J20 AVDD 1 8 Note that the AD9959 PCB is preconfigured so that the CLK_...

Страница 5: ...59 s clock input circuitry Clock Mode Select Controls whether the part is driven by a 20 MHz to 30 MHz crystal provided by the user or by an external signal generator such as Ref Clk Ref Clk Input Inp...

Страница 6: ...OARD Once the software has been successfully installed onto your PC the next step is to interface the AD9959 evaluation software to the AD9959 evaluation board via the USB Port see Figure 2 In order f...

Страница 7: ...rd illuminates 3 When the USB cable is connected the screen below appears Figure 7 Click Next to continue 05698 007 Figure 7 4 Click Continue Anyway when you see the window in Figure 8 05698 008 Figur...

Страница 8: ...are make sure that the AD9959 evaluation board is powered up connected to the computer and that the USB Status LED is flashing 2 Click on the Start button located at the bottom left hand corner of you...

Страница 9: ...15 Scrolling up through the status box with the cursor will indicate why the software did not load correctly Most status message errors can be resolved by checking jumper settings making sure that the...

Страница 10: ...AD9959 evaluation software is set to Auto I O Update so that when LOAD is clicked an I O update signal is automatically sent to the device If synchronization across channels is desired use the Manual...

Страница 11: ...file Pin 3 to control this feature using only Profile Pin 3 If you wish to use the SDIO data pins to control this feature simply select Use SDIO pins 1 2 3 Note that to use the SDIO pins to control th...

Страница 12: ...section in the Level box 4 Linear Sweep Options Use the Linear Sweep Options section to control the linear sweep features Select Enable Linear Sweep to turn on the linear sweep function and the addit...

Страница 13: ...ct either Full Scale default setting Scale Scale or Scale for the DAC output current See the Scalable DAC Reference Current Control Mode section of the AD9959 data sheet 7 Output Waveform In the Outpu...

Страница 14: ...the linear frequency sweep and the first level in frequency modulation FSK Phase Offset consists of two boxes In the first box set the integer factor 1 999 to increment or decrement the phase offset...

Страница 15: ...to the device 2 Profile Registers The AD9959 features up to 16 programmable registers per channel as shown in Figure 23 Due to certain channel constraints however there are limitations on how the Prof...

Страница 16: ...ection of the AD9959 data sheet 4 Linear Sweep Setup Use the Linear Sweep Setup section to setup the slope of the linear sweep In the Rising Step Size box enter the desired value for the rising step s...

Страница 17: ...erial port state machine Select LSB First to change the data format to LSB first from the default setting of MSB first Use the Serial I O Mode drop menu to select the desired serial I O mode of operat...

Страница 18: ...les serve as a reference and or starting point when trying to configure the device for a desired setup for the first time To load these setup files click File and select Load Setup Figure 33 or click...

Страница 19: ...The Chip Level Control window Figure 37 from this particular setup shows that a 500 MHz System Clock is running with the RU RD operation enabled In the RU RD box Use Profile Pins 2 3 has been selecte...

Страница 20: ...ction P0 controls Channel 0 P1 controls Channel 1 P2 controls Channel 2 and P3 controls Channel 3 If a profile pin is deselected the associated channel s output will return to 0 MHz To return to full...

Страница 21: ...010 Referring to the table in the 16 Level Modulation No RU RD section of the AD9959 data sheet we see that this bit pattern sets up 16 level modulation on Channel 2 05698 041 Figure 41 In the Channel...

Страница 22: ...output frequency is equivalent to the value entered in the Frequency 00 box 3 MHz in this setup If all profile pins are pressed the output frequency is equal to 48 MHz the contents of Profile Registe...

Страница 23: ...to ensure synchronization across channels and reinitialize the starting point once the linear sweep ends 05698 045 Figure 45 In the Channel Control window Figure 46 each channel has Amplitude selecte...

Страница 24: ...ing that the sweep begins at half scale and sweeps up to full scale Amplitude 01 ending point of sweep In the Linear Sweep Setup section the rising falling step size and step intervals of the sweep ar...

Страница 25: ...2 1 4 5 6 R6 50 R5 50 ADTT1 1 AVDD1 AVDD1 AVDD3 DAC3_OUT GND 3 2 1 4 5 6 R8 50 R7 50 ADTT1 1 AVDD0 AVDD0 T4 T5 DAC1 AD9958 DAC3 AD9959 DAC0 AD9958 DAC2 AD9959 GND R11 1 91k ETC1 1 13 1 5 3 4 T1 PRI SE...

Страница 26: ...L9 DAC 1 DUT FILTER OUT J5 DAC 1 AD9959 DUT OUT FILTER IN R22 0 R23 0 DAC1_OUT J1 200MHz LOW PASS FILTER C72 _F C76 _F C71 _F C74 _F C73 _F C75 _F C80 _F C77 _F C78 _F L5 GND GND GND GND GND GND GND G...

Страница 27: ...7 18 19 20 21 22 23 24 25 26 27 28 PD4 FD12 PD3 FD11 PD2 FD10 PD1 FD9 PD0 FD8 WAKEUP VCC7 RESET GND6 PA7 FLAGD SLC5 PA6 PKTEND PA5 FIFOADR1 PA4 FIFOADR0 PA3 WU2 PA2 SLOE PA1 INT1 PA0 INT0 VCC6 CTL2 FL...

Страница 28: ...charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection Although this product features proprietary ESD protection circuitry permanent dam...

Страница 29: ...AD9959 PCB Rev 0 Page 28 of 28 2005 Analog Devices Inc All rights reserved Trademarks and registered trademarks are the property of their respective owners EB05698 0 10 05 0 NOTES...

Страница 30: ...uipment Have surplus equipment taking up shelf space We ll give it a new home Learn more Visit us at artisantg com for more info on price quotes drivers technical specifications manuals and documentat...

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