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Evaluation Board 
User Guide 

UG-XXX 

 

Rev. A | Page 13 of 14 

DEBUG 

 

To access the Debug window, select 

Debug 

from the tab selection. 

 

Figure 14. Debug Window 

 

The Debug window gives you complete direct access to the 
register map as well as control of many external pins. The 
Debug window is intended for debugging issues with the 
AD9915. It can be used for all programming, but is not user-
friendly; this may result in improper programming of reserved 
bits.  

DROVR

 alerts when ramp generation is over. The ramp 

direction (rising or falling) is externally controlled by the 

DRCTL

.  Logic 0 causes the DRG to ramp with a negative 

slope, whereas logic 1 causes the DRG to ramp with a positive 
slope. 

DRHOLD

 allows the user to suspend the ramp generator 

in its present state. When this is set to logic 1, the DRG is 
stalled at its last state; otherwise, the DRG operates normally. 

EXTAMPCTL 

sets the OSK feature on either manual or 

automatic mode. 

EXTPDCTL 

is a flag input that would initiate 

the programmed power-down mode. 

RESET

 is the master reset 

that clears all memory elements and sets registers to default 
values.  

IOUPDATE

 transfers the contents of the I/O buffers to the 

corresponding internal registers.  

PS0

PS1

, and 

PS2

 control 

the profile register pins. See the AD9915 data sheet for the 
logic to control the profiles via the external pins.   

SYNC IO 

controls the SYNCIO pin.This pin is used to reset 

the serial port.   

The 

REGISTER MAP 

shows the values of all the registers in 

AD9915. Note that there are two sources (buffer) for the 
register map; software and hardware. Using the 

Software

 

source allows to display the values that reflects the current user 
interface settings. On the other hand, the 

Hardware

 source 

displays the register values that are written to, or read from the 
part which requires a 

Refresh

.   

 

Содержание AD9915

Страница 1: ...sweep capability and programmable modulus for board control and data analysis Factory tested and ready to use PACKAGE CONTENTS AD9915 evaluation board AD9915PCBZ installation software CD USB cable GEN...

Страница 2: ...s Settings 3 Evaluation Board Layout 4 Evaluation Board Software 5 Software Installation 5 Device Driver Installation 5 Starting the Software 5 Running the Software Under Windows 7 6 ICON Description...

Страница 3: ...nto the ADCLK925 could dramatically limit the AD9915 in close phase noise performance Refer to theADCLK925 data sheet for details on the maximum input speeds and input sensitivities JUMPERS SETTINGS U...

Страница 4: ...t This is the input for the external reference clock signal Refer to AD9915 datasheet for reference input range Power Supply Connections Provides all necessary supply voltages needed by the AD9915 and...

Страница 5: ...ps 3 5 STARTING THE SOFTWARE Before you start the software make sure that the AD9915 evaluation board is powered up and connected to the PC and the LED D200 USB status is on Refer to Power Supply Conn...

Страница 6: ...C The main website is indicated below http www microsoft com windows virtual pc They have specific instructions for the installation depending on the version of Windows 7 that your computer has so ref...

Страница 7: ...SCRIPTION OF CONTROL WINDOW The ICON description window is built to allow ease of access to different actions Another way of accessing these icons is by clicking the Actions tab and select among the a...

Страница 8: ...ection allows you to enable the internal PLL of AD9915 PLL enable is used to activate internal PLL of AD9915 The default setting of this box is disabled check box cleared indicating that the internal...

Страница 9: ...the Enable sine output checkbox Matched Latency Enabled allows you to align the application of the frequency tuning word the phase offset word and the amplitude scale factor at the same time If this b...

Страница 10: ...this ICON must be clicked for all initial setups andevery time the REF CLK frequency is changed 7 Click the profile tab to go to the profile windows 8 Enable profile mode via check box and enter the d...

Страница 11: ...ithin the allowable range Step size indicates the value that would be incremented while step rate determines the time interval period for that increment in s To use the digital ramp generator DRG func...

Страница 12: ...mp The Ramp Finished indicator turns on when the ramp is complete PROGRAMMABLE MODULUS WINDOW Figure 13 Programmable Modulus Window The chip is in programmable modulus mode when the Enable Programmabl...

Страница 13: ...stalled at its last state otherwise the DRG operates normally EXTAMPCTL sets the OSK feature on either manual or automatic mode EXTPDCTL is a flag input that would initiate the programmed power down m...

Страница 14: ...uction composed of the Data the Address the Length Bits and the Type of Instruction Read Write The order of the instructions can be seen from the small window which is on the left side of the REGISTER...

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