REV. 0
EVAL-AD9874EB
–4–
GND
+5.0
POWER SUPPLY
CLKIN
IFIN
LO_IN
P1
AD9874
TB1
TB4
TB3
U12
U13
IDT
FIFO
XILINX
FPGA
J6
J3
J1
LO VCO
MODULE INTERFACE
VDIRECT
MIXER OUT
TB2
EPROM
HEADER
IF MATCHING
N
ETWORK
JP1-9
VREG
JP22
JP23
JP15
JP18
CRYSTAL
OSC.
JP24
JP25
SW2
SW1
LED
FREF
J2
J5
71.10MHz
–5dBm
OUTPUT
73.35MHz
–40dBm
OUTPUT
18.00MHz
–5dBm
OUTPUT
PHASE-LOCK GENERATORS
GETTING STARTED PRINTED CIRCUIT BOARD SETUP GUIDE
1) PHASE LOCK THREE SIGNAL GENERATORS AS FOLLOWS:
GEN 1: 71.1MHz @ –5dBm
GEN 2: 73.3MHz @ –40dBm
GEN 3: 18.0MHz @ –5dBm
2) CONNECT GENERATORS TO PCB AS SHOWN.
3) CONNECT ONE POWER SUPPLY TO TB4 AND ONE SUPPLY TO TB1.
BOTH POWER SUPPLIES SHOULD BE SET AT 5.00 VDC.
NOTE: THE GNDs OF THE TWO POWER SUPPLIES
CAN BE TIED TOGETHER AT THE SUPPLIES
OR ON THE BOARD AT JP24 OR JP25.
TO NATIONAL INSTRUMENTS’
6533 CARD
GND
+5.0
POWER
SUPPLY
AD9874 REVC
ANALOG
DEVICES
Figure 2. Typical AD9874 Evaluation Board Setup with the LO and CLK Synthesizers Disabled
or group of AD9874 supply pins by proper configuration of
jumpers JP1–JP9. This is useful for automated testing in which
various supply voltages may be swept. Also, the individual supply
currents can be monitored at these jumpers.
TB4 allows the user to apply an unregulated 5 V supply to five
voltage regulators that provide regulated supplies to the AD9874
by proper configuration of JP1–JP9. The voltage of these regulators
can be controlled over a 2.2 V to 3.8 V range via a potentiometer.
TB1 provides an unregulated 5 V supply for the digital ICs,
while TB2 provides a user-defined supply level for the LO VCO
module (if installed).
Evaluation Board Setup Example
Figure 2 shows an example of a lab setup used to evaluate the
AD9874. In this example, three RF generators are used to drive
the IFIN, LO_IN, and CLKIN SMA connectors, since both the
LO and CLK synthesizers of the AD9874 are disabled. All of
the RF generators are phase locked to minimize the phase noise
contribution and enable coherent sampling. Note, only a single
RF generator would be required to supply the IFIN signal if the
LO and CLK synthesizers were enabled with the necessary
external components installed (i.e., crystal oscillator, PLL loop
filter, VCO module, and so on).
Two 5 V supplies are connected to TB4 and TB1 with JP24 (or
J25) installed to connect the grounds of the supplies together.
Individual supplies to the AD9874 can be varied via the potenti-
ometers. A shielded interface cable (National Instruments Part
No. 183432-01) is used to connect the evaluation board to the
NI 6533 digital I/O card.
