Amplicon Liveline PC27E, Инструкция по эксплуатации

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Page 18 PC27E
Example 1
To select Counter 1 to Mode 3, loading/reading low order byte followed by high order byte in
binary, the control word is:
0 1 1 1 0 1 1 0 = 76 hex
This value has to be loaded to the control register whose address is Base A 07.
Assuming that the board base address is 0300, the following BASICA or QuickBASIC
statement will load the control register with 76 hex.
OUT &H0307, &H76
The value of the count has now to be loaded to the counter. The address of Counter 1 is base
a05 which, in our example would be 0305. To load the value 50 decimal to this
counter the Turbo Pascal statements
Port[$305] := $32;
Port[$305] := 0;
are used.
It should be noted that both the low order and high order bytes have to be loaded even though
the high order byte, as in the above example, is zero.
Example 2
To read the current count on Counter 1 without affecting the counting operation the counter
has to be latched. To do this the control word 0 1 0 0 0 1 1 0 (46 hex) is loaded to the control
register by
OUT &H0307, &H46
The two bytes then have to be read from the latch using the command
n = INP( &H0305 )
to read the low order byte followed by
n = INP( &H0305 )
to read the high order byte. The two bytes MUST be read before attempting to execute
another OUT instruction on the same counter.
6.5 Programming the 7870 A/D Converter
There is no need for software programming of the A/D mode since the operational conditions
are set up in the hardware on the PC27E. The 7870 is wired for Mode 1 operation, with
parallel output format in two bytes.
A conversion is initiated by a low going pulse on /CONVST, which is generated by the PAL
whenever START (BA +2 write) is addressed. At the end of a conversion /BUSY goes low,
generating an IRQ, if selected. A read operation to the 7870 accesses the data and the
/BUSY line is reset high again.
To access the data, two read operations are required. The HBE pin selects which byte of data
is to be read; when low (BA+0 read) the lower 8 bits are placed on the data bus, when high
(BA + 1 read) the upper 4 bits of the 12 bit word are placed on the data bus. These 4 bits are
right justified and thereby occupy the lower nibble of the data byte, while the higher nibble
contains zeros.