Amplicon Liveline PC27E, Инструкция по эксплуатации

Страница: 10 / 24

Page 10 PC27E
&'''
!( )%)%#"*+,%-
!( )%)%#"*.+,%-
%#%/01#.0
)%.#$%
.#(/)0%#
.#(/)0%#
.#(/)0%#
.#(/)0%#/0%#2#"
(! '
!3
!3
!3
!3
!3
!3
!3
!3
TABLE 1 ADDRESS SPACE FUNCTIONS
4.3 Interrupt Request Level Selection
There are six Interrupt Request levels available on the PC27E, IRQ2 - IRQ7 with IRQ2 having
highest priority and IRQ7 the lowest priority. The interrupt level is selected by the position of
jumper J5, and, when selected, an interrupt will be sent to the 8259 interrupt controller inside
the computer at that level on the falling edge of /BUSY from the A/D converter (ie at the end
of a conversion - see section 6.4).
4.4 Counter/Timer Clock Selection
4.4.1 Timing for A/D Conversion
The 4MHz on-board clock signal is used as the source for the Counter/Timer. Any one of the
three outputs of the Counter/Timer can be connected to the /TIM input of the PAL. A falling
edge of /TIM will trigger an A/D conversion.
Jumpers J2, J3 and J4 may be positioned according to the required frequency of /TIM. The
connections to these jumpers, showing the factory configuration, are given in figure 2.
The 4MHz clock is the input to Counter 0, who’s output can be jumpered to /TIM or cascaded
to the Counter 1 clock input, through Jumper J2 (see fig 2). If cascaded, the output of Counter
1 can be connected to /TIM, by positioning J3 in the upper position, or cascaded to the
Counter 2 clock input by positioning J4 in the upper position. If cascaded the output of
Counter 2 can be connected to /TIM by positioning J3 in the lower position.
An external TTL compatible signal connected to SK1 pin 1 can be used as an alternative
clock input to Counter 2 by positioning J4 in the lower position.
4
/5
6
4
4
6
4
/5
&(
6
4
!
7$$
6
FIG.2 CONNECTIONS TO COUNTER/TIMER JUMPERS