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Installation & Programming Manual
Chapter 3: Set-Up & Programming
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Command Bit Register (Word 0)
The Status Bit Register has been defined below:
Programming Bit (15)
The 1746R PLC Resolver Interface Module will monitor the programming bit for a 0 to 1
transition. When this is detected, it reads the command register and processes the data based on
the command specified. If the command data and parameter data are valid, the acknowledge bit is
set in the input image table bit register. If the data is invalid, the error bit will be set in the input
image table bit register. These bits are cleared when the programming bit is set back to zero.
Clear Brake Error Bit (9) & Clear Brake Warning Bit (8)
The clear brake monitor error bit and clear brake monitor warning bit are used to clear the error
conditions produced by the brake monitor. The 1746R PLC Resolver Interface Module will
monitor these bits for a 0 to 1 transition. When it is detected, the corresponding error bit in the
input image table will be cleared.
Data Format Bit (7)
The purpose of this bit is to add an option that will allow the customer to display the position
value in a more readable format. By setting bit 7 of the Command bit register to one, the position
will be displayed in the following format: The thousandths digits will be displayed in the high
word and the ones, tens and hundredths digits will be displayed in the low word. See example
below and specifications for increased update time.
Example:
Position is 35111.
Without the data format option (Command bit register, bit 7 = 0), the position would be displayed
in the input image table as:
0
;high word
-30425
;low word
With the data format option selected (Command bit register, bit 7=1), the position would be
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Spec Tech Industrial Electric www.spectechind.com
888-773-2832
Spec Tech Industrial Electric www.spectechind.com
888-773-2832
