May 2011
Altera Corporation
Nios II Hardware Development Tutorial
1. Nios II Hardware Development
This tutorial introduces you to the system development flow for the Nios
®
II
processor. Using the Quartus
®
II software and the Nios II Embedded Design Suite
(EDS), you build a Nios II hardware system design and create a software program
that runs on the Nios II system and interfaces with components on Altera
®
development boards. The tutorial is a good starting point if you are new to the Nios II
processor or the general concept of building embedded systems in FPGAs.
Building embedded systems in FPGAs involves system requirements analysis,
hardware design tasks, and software design tasks. This tutorial guides you through
the basics of each topic, with special focus on the hardware design steps. Where
appropriate, the tutorial refers you to further documentation for greater detail.
f
If you are interested only in software development for the Nios II processor, refer to
the tutorial in the
Getting Started with the Graphical User Interface
chapter of the
Nios II
Software Developer’s Handbook
.
When you complete this tutorial, you will understand the Nios II system
development flow, and you will be able to create your own custom Nios II system.
Design Example
The design example you build in this tutorial demonstrates a small Nios II system for
control applications, that displays character I/O output and blinks LEDs in a binary
counting pattern. This Nios II system can also communicate with a host computer,
allowing the host computer to control logic inside the FPGA.
The example Nios II system contains the following components:
■
Nios II/s processor core
■
On-chip memory
■
Timer
■
JTAG UART
■
8-bit parallel I/O (PIO) pins to control the LEDs
■
System identification component
