Chapter 1: Nios II Hardware Development
1–9
Creating the Design Example
May 2011
Altera Corporation
Nios II Hardware Development Tutorial
Perform the following steps to set up the design environment:
1. Locate the zipped design files on the Altera web site.
2. Unzip the contents of the zip file to a directory on your computer. Do not use
spaces in the directory path name.
The remainder of this tutorial refers to this directory as the
<design files directory>
.
Analyze System Requirements
This section describes the system requirements for the tutorial design example. The
design example has the following goals:
■
Demonstrate a simple Nios II processor system that you can use for control
applications.
■
Build a practical, real-world system, while providing an educational experience.
■
Demonstrate the most common and effective techniques to build practical, custom
Nios II systems.
■
Build a Nios II system that works on any board with an Altera FPGA. The entire
system must use only on-chip resources, and not rely on the target board.
■
The design should conserve on-chip logic and memory resources so it can fit in a
wide range of target FPGAs.
These goals lead to the following design decisions:
■
The Nios II system uses only the following inputs and outputs:
■
One clock input, which can be any constant frequency.
■
Eight optional outputs to control LEDs on the target board.
■
The design uses the following components:
■
Nios II/s core with 2 KB of instruction cache
■
20 KB of on-chip memory
■
Timer
■
JTAG UART
■
Eight output-only parallel I/O (PIO) pins
■
System ID component
f
For more information about these and other components, refer to the
.
Start the Quartus II Software and Open the Example Project
To start, you open the Quartus II project for the tutorial design example. This
Quartus II project serves as an easy starting point for the Nios II development flow.
The Quartus II project contains all settings and design files required to create the .
sof
.
