Chapter 2: Board Components
2–63
Power Supply
© March 2009 Altera Corporation
Cyclone III 3C120 Development Board Reference Manual
Figure 2–17.
Power Distribution System
W
ide Inp
u
t
S
w
itching
Reg
u
lator
(LT34
8
1)
Linear
(LT1761)
2.013A
1.2
V
2.000A
12
V
0.013A
12
V
4.169A
3.3
V
0.002A
3.3
V
1.036A
3.3
V
0.002A
3.0
V
1.036A
2.5
V
0.619A
2.5
V
0.013A
5.0
V
W
ide Inp
u
t
S
w
itching
Reg
u
lator
(LTM4601)
10.429A
12
V
Po
w
erNet
HMCA Port A
HMCB Port B
5.0
V
Partial Plane
Character LCD
DDR2 Term Reg
u
lators
Linear
8
0% eff.
(LT1761)
3.0
V
_CSENSE
Partial Plane
LTC1
8
65Lm AD
8
531,
INA271, ADG725
1.045A
1.
8V
0.005A
5.0
V
1.045A
0.9
V
V
REF_B3_B4
Linear (TPS5100)
V
TT_B3_B4
Partial Plane
DDR2BOT Term
1.205A
1.
8V
0.005A
5.0
V
1.205A
0.9
V
V
REF_B7_B
8
Linear (TPS5100)
V
TT_B7_B
8
Partial Plane
DDR2TOP Term
2.5
V
_B1_B2
Partial Plane
FPGA
V
CCIO1
FPGA
V
CCIO2
Linear
(LT1963)
R
MEASURE
0.1
8
2A
2.5
V
2.5
V
_B5_B6
Partial Plane
FPGA
V
CCIO5
FPGA
V
CCIO6
0.1
8
2A
2.5
V
2.5
V
_
V
CCA
Partial Plane
FPGA
V
CCA
0.053A
2.5
V
2.5
V
Partial Plane
MAXIIG
V
CCIO1/2,
Enet PHY
V
DDO/H/X+A
V
DD,
Graphics LCD
V
DD
3.200A
3.3
V
4.693A
1.
8V
1.747A
1.
8V
1.
8V
_B3_B4
Partial Plane
FPGA
V
CCIO3
FPGA
V
CCIO4
S
w
itching
Reg
u
lator
(LTC341
8
)
0.34
8
A
1.
8V
1.
8V
_B7_B
8
Partial Plane
FPGA
V
CCIO7
FPGA
V
CCIO
8
0.34
8
A
1.
8V
V
IN
V
V
LDOIN
V
IN
V
V
LDOIN
1.
8V
Partial Plane DDR2
V
DD/
V
DDQ, MAXIIG
V
CCINT,
MAXIIG
V
CCIO3/4, SRAM
V
CC/
V
CCQ, Flash
V
DDQ,
24M/50M/125M Oscillators
1.902A
3.3
V
4.1
8
4A
1.2
V
3.
8
14A
1.2
V
1.2
V
Po
w
er Net
Enet PHY D
V
DD
S
w
itching
Reg
u
lator
(LTC341
8
)
0.250A
1.2
V
1.2
V
_INT
Partial Plane
FPGA
V
CCINT
0.120A
3.3
V
0.120A
1.2
V
0.120A
1.2
V
Linear
Reg
u
lator
(LTC1963A)
1.2
V
_
V
CCD
Partial Plane
FPGA
V
CCD
3.3
V
Partial Plane
Flash
V
DD, FTDI USB
V
CC,
Cypress USB
V
CC/A
V
CC,
25M Oscillator,
HSMC Port A, HSMC Port B
DC Inp
u
t
14
V
- 20
V
8
0% eff.
R
MEASURE
R
MEASURE
R
MEASURE
R
MEASURE
R
MEASURE
R
MEASURE
R
MEASURE
R
MEASURE
R
MEASURE
R
MEASURE
R
MEASURE
R
MEASURE
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